75   const MipsSEInstrInfo &TII;  member in __anon54efea600111::ExpandPseudo
83       TII(*static_cast<const MipsSEInstrInfo *>(Subtarget.getInstrInfo())),  in ExpandPseudo()
159   TII.loadRegFromStack(MBB, I, VR, FI, RC, &RegInfo, 0);  in expandLoadCCond()
160   BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), Dst)  in expandLoadCCond()
174   BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), VR)  in expandStoreCCond()
176   TII.storeRegToStack(MBB, I, VR, true, FI, RC, &RegInfo, 0);  in expandStoreCCond()
195   const MCInstrDesc &Desc = TII.get(TargetOpcode::COPY);  in expandLoadACC()
197   TII.loadRegFromStack(MBB, I, VR0, FI, RC, &RegInfo, 0);  in expandLoadACC()
199   TII.loadRegFromStack(MBB, I, VR1, FI, RC, &RegInfo, RegSize);  in expandLoadACC()
220   BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);  in expandStoreACC()
221   TII.storeRegToStack(MBB, I, VR0, true, FI, RC, &RegInfo, 0);  in expandStoreACC()
222   BuildMI(MBB, I, DL, TII.get(MFHiOpc), VR1).addReg(Src, SrcKill);  in expandStoreACC()
223   TII.storeRegToStack(MBB, I, VR1, true, FI, RC, &RegInfo, RegSize);  in expandStoreACC()
253   BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);  in expandCopyACC()
254   BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstLo)  in expandCopyACC()
256   BuildMI(MBB, I, DL, TII.get(MFHiOpc), VR1).addReg(Src, SrcKill);  in expandCopyACC()
257   BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstHi)  in expandCopyACC()
303     TII.storeRegToStack(MBB, I, LoReg, I->getOperand(1).isKill(), FI, RC,  in expandBuildPairF64()
305     TII.storeRegToStack(MBB, I, HiReg, I->getOperand(2).isKill(), FI, RC,  in expandBuildPairF64()
307     TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, 0);  in expandBuildPairF64()
355     TII.storeRegToStack(MBB, I, SrcReg, I->getOperand(1).isKill(), FI, RC,  in expandExtractElementF64()
357     TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, Offset);  in expandExtractElementF64()
373   const MipsSEInstrInfo &TII =  in emitPrologue()  local
402   TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);  in emitPrologue()
407   BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
438         BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
443         BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
454         BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
459         BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
465         BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
476       TII.storeRegToStackSlot(MBB, MBBI, ABI.GetEhDataReg(I), false,  in emitPrologue()
486       BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
494     BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO)  in emitPrologue()
500     BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
511       BuildMI(MBB, MBBI, dl, TII.get(ADDiu), VR).addReg(ZERO) .addImm(MaxAlign);  in emitPrologue()
512       BuildMI(MBB, MBBI, dl, TII.get(AND), SP).addReg(SP).addReg(VR);  in emitPrologue()
517         BuildMI(MBB, MBBI, dl, TII.get(ADDu), BP)  in emitPrologue()
531   const MipsSEInstrInfo &TII =  in emitEpilogue()  local
552     BuildMI(MBB, I, dl, TII.get(ADDu), SP).addReg(FP).addReg(ZERO);  in emitEpilogue()
566       TII.loadRegFromStackSlot(MBB, I, ABI.GetEhDataReg(J),  in emitEpilogue()
578   TII.adjustStackPtr(SP, StackSize, MBB, MBBI);  in emitEpilogue()
588   const TargetInstrInfo &TII = *STI.getInstrInfo();  in spillCalleeSavedRegisters()  local
605     TII.storeRegToStackSlot(*EntryBlock, MI, Reg, IsKill,  in spillCalleeSavedRegisters()