875   unsigned diReg = Op1.Mem.BaseReg;  in doSrcDstMatch()
876   unsigned siReg = Op2.Mem.BaseReg;  in doSrcDstMatch()
2222     if (Op.isMem() && Op.Mem.SegReg == 0 &&  in ParseInstruction()
2223         isa<MCConstantExpr>(Op.Mem.Disp) &&  in ParseInstruction()
2224         cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 &&  in ParseInstruction()
2225         Op.Mem.BaseReg == MatchRegisterName("dx") && Op.Mem.IndexReg == 0) {  in ParseInstruction()
2227       Operands.back() = X86Operand::CreateReg(Op.Mem.BaseReg, Loc, Loc);  in ParseInstruction()
2234     if (Op.isMem() && Op.Mem.SegReg == 0 &&  in ParseInstruction()
2235         isa<MCConstantExpr>(Op.Mem.Disp) &&  in ParseInstruction()
2236         cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 &&  in ParseInstruction()
2237         Op.Mem.BaseReg == MatchRegisterName("dx") && Op.Mem.IndexReg == 0) {  in ParseInstruction()
2239       Operands[1] = X86Operand::CreateReg(Op.Mem.BaseReg, Loc, Loc);  in ParseInstruction()
2759         UnsizedMemOp->Mem.Size = getPointerWidth();  in MatchAndEmitIntelInstruction()
2773       UnsizedMemOp->Mem.Size = Size;  in MatchAndEmitIntelInstruction()
2789       UnsizedMemOp->Mem.Size = 0;  in MatchAndEmitIntelInstruction()
2806     UnsizedMemOp->Mem.Size = 0;  in MatchAndEmitIntelInstruction()