1 /* $NetBSD: amdgpioreg.h,v 1.1 2025/02/26 15:18:46 ryoon Exp $ */
2 
3 /*      $OpenBSD: amdgpio.c,v 1.10 2022/10/20 20:40:57 kettenis Exp $   */
4 /*
5  * Copyright (c) 2016 Mark Kettenis
6  * Copyright (c) 2019 James Hastings
7  *
8  * Permission to use, copy, modify, and distribute this software for any
9  * purpose with or without fee is hereby granted, provided that the above
10  * copyright notice and this permission notice appear in all copies.
11  *
12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19  */
20 
21 #ifndef _AMDGPIOREG_H
22 #define _AMDGPIOREG_H
23 
24 #define AMDGPIO_NPINS                             184
25 #define AMDGPIO_PIN_REG(pin)            ((pin) * 4)
26 
27 #define AMDGPIO_CONF_LEVEL              0x00000100
28 #define AMDGPIO_CONF_ACTLO              0x00000200
29 #define AMDGPIO_CONF_ACTBOTH            0x00000400
30 #define AMDGPIO_CONF_MASK               0x00000600
31 #define AMDGPIO_CONF_INTR_EN            0x00000800
32 #define AMDGPIO_CONF_INTR_MASK_EN       0x00001000
33 #define AMDGPIO_CONF_GPIORXSTATE        0x00010000
34 #define AMDGPIO_CONF_GPIOTXSTATE        0x00400000
35 #define AMDGPIO_CONF_GPIOTXSTATE_EN     0x00800000
36 #define AMDGPIO_CONF_INTR_STATUS        0x10000000
37 
38 /* n should be 0 or 1. */
39 #define AMDGPIO_INTR_STATUS(n)                    (0x2f8 + (n) * 4)
40 
41 #define   AMDGPIO_INTR_MASTER           0xfc
42 #define AMDGPIO_INTR_MASTER_EIO                   0x20000000
43 #define AMDGPIO_INTR_STATUS_NBITS       46
44 #define AMDGPIO_INTR_NPINS              4
45 
46 #endif /* _AMDGPIOREG_H */
47