| /NextBSD/contrib/llvm/tools/clang/lib/StaticAnalyzer/Core/ |
| HD | RangeConstraintManager.cpp | 105 void IntersectInRange(BasicValueFactory &BV, Factory &F, in IntersectInRange() 238 RangeSet Intersect(BasicValueFactory &BV, Factory &F, in Intersect() 354 BasicValueFactory &BV = getBasicVals(); in checkNull() local 391 BasicValueFactory &BV = getBasicVals(); in GetRange() local
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| HD | MemRegion.cpp | 1392 VarVec *BV = (VarVec*) A.Allocate<VarVec>(); in LazyInitializeReferencedVars() local
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| /NextBSD/contrib/llvm/include/llvm/ADT/ |
| HD | SmallBitVector.h | 105 void switchToLarge(BitVector *BV) { in switchToLarge() 266 BitVector *BV = new BitVector(SmallSize); in reserve() local
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| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | AggressiveAntiDepBreaker.cpp | 506 BitVector BV(TRI->getNumRegs(), false); in GetRenameRegisters() local 571 BitVector BV = GetRenameRegisters(Reg); in FindSuitableFreeRegisters() local 658 BitVector BV = RenameRegisterMap[Reg]; in FindSuitableFreeRegisters() local
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| HD | RegisterScavenging.cpp | 93 void RegScavenger::addRegUnits(BitVector &BV, unsigned Reg) { in addRegUnits()
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| HD | MachineFunction.cpp | 585 BitVector BV(TRI->getNumRegs()); in getPristineRegs() local
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| /NextBSD/contrib/llvm/tools/clang/lib/Analysis/ |
| HD | AnalysisDeclContext.cpp | 517 DeclVec *BV = (DeclVec*) A.Allocate<DeclVec>(); in LazyInitializeReferencedDecls() local
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| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | TargetLowering.cpp | 1194 const BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N); in isConstTrueVal() local 1224 const BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N); in isConstFalseVal() local
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| HD | DAGCombiner.cpp | 757 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N)) { in isConstOrConstSplat() local 778 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N)) { in isConstOrConstSplatFP() local 7305 ConstantFoldBITCASTofBUILD_VECTOR(SDNode *BV, EVT DstEltVT) { in ConstantFoldBITCASTofBUILD_VECTOR() 11871 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, Ops); in reduceBuildVecExtToExtBuildVec() local 11944 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, Opnds); in reduceBuildVecConvertToConvertBuildVec() local
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| HD | SelectionDAG.cpp | 1547 auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) { in getVectorShuffle() 1620 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) { in getVectorShuffle() local 2933 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand)) { in getNode() local
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| /NextBSD/contrib/llvm/tools/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| HD | SymbolManager.h | 481 BasicValueFactory &BV; variable
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| /NextBSD/contrib/llvm/lib/Analysis/ |
| HD | LazyValueInfo.cpp | 344 bool pushBlockValue(const std::pair<BasicBlock *, Value *> &BV) { in pushBlockValue()
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| HD | ValueTracking.cpp | 2880 static bool isDereferenceableFromAttribute(const Value *BV, APInt Offset, in isDereferenceableFromAttribute() 3033 const Value *BV = V->stripAndAccumulateInBoundsConstantOffsets(DL, Offset); in isDereferenceablePointer() local
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| HD | DependenceAnalysis.cpp | 3322 static void dumpSmallBitVector(SmallBitVector &BV) { in dumpSmallBitVector()
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| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonGenInsert.cpp | 607 const BitTracker::BitValue &BV = RC[i]; in isConstant() local 623 const BitTracker::BitValue &BV = RC[i]; in isSmallConstant() local
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| HD | BitTracker.cpp | 87 raw_ostream &llvm::operator<<(raw_ostream &OS, const BT::BitValue &BV) { in operator <<()
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| /NextBSD/contrib/llvm/utils/TableGen/ |
| HD | CodeGenRegisters.cpp | 2118 BitVector BV(Registers.size() + 1); in computeCoveredRegisters() local
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86ISelLowering.cpp | 5601 static SDValue LowerToAddSub(const BuildVectorSDNode *BV, in LowerToAddSub() 5703 static SDValue LowerToHorizontalOp(const BuildVectorSDNode *BV, in LowerToHorizontalOp() 5872 BuildVectorSDNode *BV = cast<BuildVectorSDNode>(Op.getNode()); in LowerBUILD_VECTOR() local 9316 auto *BV = dyn_cast<BuildVectorSDNode>(V); in splitAndLowerVectorShuffle() local 12521 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v32i8, pshufbMask); in LowerTRUNCATE() local 13507 BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Op1.getNode()); in ChangeVSETULTtoVSETULE() local 17250 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Amt)) { in LowerScalarVariableShift() local 17375 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Elts); in LowerShift() local 18059 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, NewVT, Elts); in LowerBITCAST() local 25112 if (BuildVectorSDNode *BV = in performVectorCompareAndMaskUnaryOpCombine() local
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| /NextBSD/contrib/llvm/lib/Target/Mips/ |
| HD | MipsSEISelLowering.cpp | 856 BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N->getOperand(1)); in performDSPShiftCombine() local
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| /NextBSD/contrib/llvm/lib/Transforms/Vectorize/ |
| HD | BBVectorize.cpp | 2736 Instruction *BV = new ShuffleVectorInst(LOp, HOp, in getReplacementInput() local
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| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelLowering.cpp | 7204 if (BuildVectorSDNode *BV = in performVectorCompareAndMaskUnaryOpCombine() local
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMISelLowering.cpp | 8858 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, FloatVT, Ops); in PerformBUILD_VECTORCombine() local
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