xref: /dragonfly/sys/dev/drm/include/drm/amd_asic_type.h (revision b843c749addef9340ee7d4e250b09fdd492602a1)
1 /*
2  * Copyright 2017 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #ifndef __AMD_ASIC_TYPE_H__
24 #define __AMD_ASIC_TYPE_H__
25 /*
26  * Supported ASIC types
27  */
28 enum amd_asic_type {
29           CHIP_TAHITI = 0,
30           CHIP_PITCAIRN,
31           CHIP_VERDE,
32           CHIP_OLAND,
33           CHIP_HAINAN,
34           CHIP_BONAIRE,
35           CHIP_KAVERI,
36           CHIP_KABINI,
37           CHIP_HAWAII,
38           CHIP_MULLINS,
39           CHIP_TOPAZ,
40           CHIP_TONGA,
41           CHIP_FIJI,
42           CHIP_CARRIZO,
43           CHIP_STONEY,
44           CHIP_POLARIS10,
45           CHIP_POLARIS11,
46           CHIP_POLARIS12,
47           CHIP_VEGAM,
48           CHIP_VEGA10,
49           CHIP_VEGA12,
50           CHIP_VEGA20,
51           CHIP_RAVEN,
52           CHIP_LAST,
53 };
54 
55 #endif /*__AMD_ASIC_TYPE_H__ */
56