| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 63 const DebugLoc &dl, unsigned DestReg, in emitThumb1LoadConstPool()
83 const DebugLoc &dl, unsigned DestReg, in emitThumb2LoadConstPool()
105 const DebugLoc &dl, Register DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
125 const DebugLoc &dl, Register DestReg, Register BaseReg, int NumBytes, in emitThumbRegPlusImmInReg()
187 const DebugLoc &dl, Register DestReg, in emitThumbRegPlusImmediate()
375 Register DestReg = MI.getOperand(0).getReg(); in rewriteFrameIndex() local
400 Register DestReg = FrameReg; in rewriteFrameIndex() local
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| D | Thumb1InstrInfo.cpp | 41 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
109 Register DestReg, int FI, in loadRegFromStackSlot()
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| D | Thumb2InstrInfo.cpp | 134 Register DestReg = MI.getOperand(0).getReg(); in optimizeSelect() local
152 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
210 Register DestReg, int FI, in loadRegFromStackSlot()
293 const DebugLoc &dl, Register DestReg, in emitT2RegPlusImmediate()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 390 Register DestReg = createResultReg(RC); in materializeFP() local
396 Register DestReg = createResultReg(RC); in materializeFP() local
411 Register DestReg = createResultReg(RC); in materializeGV() local
433 Register DestReg = createResultReg(RC); in materializeExternalCallSym() local
1003 Register DestReg = createResultReg(&Mips::AFGR64RegClass); in selectFPExt() local
1080 Register DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc() local
1118 Register DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt() local
1594 Register DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall() local
1722 Register DestReg = VA.getLocReg(); in selectRet() local
1824 unsigned DestReg) { in emitIntSExt32r1()
[all …]
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| D | MipsInstrInfo.h | 146 MachineBasicBlock::iterator MBBI, Register DestReg, in loadRegFromStackSlot()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/ |
| D | RISCVExpandAtomicPseudoInsts.cpp | 221 Register DestReg = MI.getOperand(0).getReg(); in doAtomicBinOpExpansion() local
257 MachineBasicBlock *MBB, Register DestReg, in insertMaskedMerge()
283 Register DestReg = MI.getOperand(0).getReg(); in doMaskedAtomicBinOpExpansion() local
422 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicMinMaxOp() local
524 Register DestReg, Register CmpValReg, in tryToFoldBNEOnCmpXchgResult()
578 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicCmpXchg() local
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| D | RISCVMergeBaseOffset.cpp | 286 Register DestReg = Lo.getOperand(0).getReg(); in detectAndFoldOffset() local
346 Register DestReg = Lo.getOperand(0).getReg(); in foldIntoMemoryOps() local
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| D | RISCVRegisterInfo.cpp | 166 const DebugLoc &DL, Register DestReg, in adjustReg()
365 Register DestReg = II->getOperand(0).getReg(); in lowerVRELOAD() local
441 Register DestReg; in eliminateFrameIndex() local
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| D | RISCVExpandPseudoInsts.cpp | 147 Register DestReg = MI.getOperand(0).getReg(); in expandCCOp() local
324 Register DestReg = MI.getOperand(0).getReg(); in expandAuipcInstPair() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/VE/ |
| D | VERegisterInfo.cpp | 146 inline MachineInstrBuilder build(const MCInstrDesc &MCID, Register DestReg) { in build()
149 inline MachineInstrBuilder build(unsigned InstOpc, Register DestReg) { in build()
264 Register DestReg = MI.getOperand(0).getReg(); in processLDQ() local
334 Register DestReg = MI.getOperand(0).getReg(); in processLDVM() local
420 Register DestReg = MI.getOperand(0).getReg(); in processLDVM512() local
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| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 366 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
378 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
396 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
407 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
418 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
474 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| D | SystemZPostRewrite.cpp | 82 Register DestReg = MBBI->getOperand(0).getReg(); in selectLOCRMux() local
103 Register DestReg = MBBI->getOperand(0).getReg(); in selectSELRMux() local
157 Register DestReg = MI.getOperand(0).getReg(); in expandCondMove() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 77 Register DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
84 Register DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
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| D | HexagonCopyToCombine.cpp | 134 Register DestReg = Op0.getReg(); in isCombinableInstType() local
147 Register DestReg = Op0.getReg(); in isCombinableInstType() local
244 unsigned DestReg, in isUnsafeToMoveAcross()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUMachineCFGStructurizer.cpp | 159 PHILinearize::findPHIInfoElement(unsigned DestReg) { in findPHIInfoElement()
196 void PHILinearize::addDest(unsigned DestReg, const DebugLoc &DL) { in addDest()
210 void PHILinearize::deleteDef(unsigned DestReg) { in deleteDef()
216 void PHILinearize::addSource(unsigned DestReg, unsigned SourceReg, in addSource()
221 void PHILinearize::removeSource(unsigned DestReg, unsigned SourceReg, in removeSource()
227 unsigned &DestReg) { in findDest()
238 unsigned DestReg; in isSource() local
242 unsigned PHILinearize::getNumSources(unsigned DestReg) { in getNumSources()
1377 unsigned DestReg = getPHIDestReg(PHI); in storePHILinearizationInfo() local
1537 auto DestReg = getPHIDestReg(PHI); in replaceEntryPHI() local
[all …]
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| D | R600MachineScheduler.cpp | 266 Register DestReg = MI->getOperand(0).getReg(); in getAluKind() local
353 Register DestReg = MI->getOperand(DstIndex).getReg(); in AssignSlot() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 33 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
150 Register DestReg, int FI, in loadRegFromStackSlot()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 64 Register DestReg, int FrameIdx, in loadRegFromStackSlot()
92 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 818 bool IsZExt, unsigned DestReg, in PPCEmitCmp()
986 unsigned DestReg; in SelectFPTrunc() local
1094 Register DestReg = createResultReg(&PPC::SPERCRegClass); in SelectIToFP() local
1131 Register DestReg = createResultReg(RC); in SelectIToFP() local
1223 unsigned DestReg; in SelectFPToI() local
1808 unsigned DestReg, bool IsZExt) { in PPCEmitIntExt()
2006 Register DestReg = createResultReg(RC); in PPCMaterializeFP() local
2062 Register DestReg = createResultReg(RC); in PPCMaterializeGV() local
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| D | PPCRegisterInfo.cpp | 1015 Register DestReg = MI.getOperand(0).getReg(); in lowerCRRestore() local
1177 Register DestReg = MI.getOperand(0).getReg(); in lowerCRBitRestore() local
1212 MCRegister DestReg, MCRegister SrcReg) { in emitAccCopyInfo()
1365 Register DestReg = MI.getOperand(0).getReg(); in lowerACCRestore() local
1440 Register DestReg = MI.getOperand(0).getReg(); in lowerWACCRestore() local
1493 Register DestReg = MI.getOperand(0).getReg(); in lowerQuadwordRestore() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/AsmParser/ |
| D | RISCVAsmParser.cpp | 2321 void RISCVAsmParser::emitLoadImm(MCRegister DestReg, int64_t Value, in emitLoadImm()
2355 void RISCVAsmParser::emitAuipcInstPair(MCOperand DestReg, MCOperand TmpReg, in emitAuipcInstPair()
2390 MCOperand DestReg = Inst.getOperand(0); in emitLoadLocalAddress() local
2407 MCOperand DestReg = Inst.getOperand(0); in emitLoadAddress() local
2429 MCOperand DestReg = Inst.getOperand(0); in emitLoadTLSIEAddress() local
2444 MCOperand DestReg = Inst.getOperand(0); in emitLoadTLSGDAddress() local
2461 MCOperand DestReg = Inst.getOperand(DestRegOpIdx); in emitLoadStoreSymbol() local
2479 MCOperand DestReg = Inst.getOperand(0); in emitPseudoExtend() local
2599 unsigned DestReg = Inst.getOperand(0).getReg(); in validateInstruction() local
2613 unsigned DestReg = Inst.getOperand(0).getReg(); in validateInstruction() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AVR/ |
| D | AVRInstrInfo.cpp | 43 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
161 Register DestReg, int FrameIndex, in loadRegFromStackSlot()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARC/ |
| D | ARCInstrInfo.cpp | 283 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
322 Register DestReg, int FrameIndex, in loadRegFromStackSlot()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 333 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
380 Register DestReg, int FrameIndex, in loadRegFromStackSlot()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86FixupLEAs.cpp | 411 Register DestReg = I->getOperand(0).getReg(); in searchALUInst() local
572 Register DestReg = MI.getOperand(0).getReg(); in optTwoAddrLEA() local
765 Register DestReg = Dest.getReg(); in processInstrForSlow3OpLEA() local
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