Home
last modified time | relevance | path

Searched defs:DstReg (Results 1 – 25 of 108) sorted by relevance

12345

/openbsd/src/gnu/llvm/llvm/lib/Target/AVR/
DAVRExpandPseudoInsts.cpp61 Register DstReg) { in buildMI()
149 Register DstReg = MI.getOperand(0).getReg(); in expandArith() local
182 Register DstReg = MI.getOperand(0).getReg(); in expandLogic() local
230 Register DstReg = MI.getOperand(0).getReg(); in expandLogicImm() local
284 Register DstReg = MI.getOperand(0).getReg(); in expand() local
338 Register DstReg = MI.getOperand(0).getReg(); in expand() local
403 Register DstReg = MI.getOperand(0).getReg(); in expand() local
435 Register DstReg = MI.getOperand(0).getReg(); in expand() local
474 Register DstReg = MI.getOperand(0).getReg(); in expand() local
507 Register DstReg = MI.getOperand(0).getReg(); in expand() local
[all …]
DAVRRegisterInfo.cpp113 Register DstReg) { in foldFrameOffset()
169 Register DstReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonPeephole.cpp135 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
155 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
172 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
183 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
205 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86InstructionSelector.cpp269 Register DstReg = I.getOperand(0).getReg(); in selectCopy() local
730 MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg, in selectTurnIntoCOPY()
751 const Register DstReg = I.getOperand(0).getReg(); in selectTruncOrPtrToInt() local
815 const Register DstReg = I.getOperand(0).getReg(); in selectZext() local
880 const Register DstReg = I.getOperand(0).getReg(); in selectAnyext() local
1077 const Register DstReg = I.getOperand(0).getReg(); in selectUadde() local
1137 const Register DstReg = I.getOperand(0).getReg(); in selectExtract() local
1188 bool X86InstructionSelector::emitExtractSubreg(unsigned DstReg, unsigned SrcReg, in emitExtractSubreg()
1226 bool X86InstructionSelector::emitInsertSubreg(unsigned DstReg, unsigned SrcReg, in emitInsertSubreg()
1269 const Register DstReg = I.getOperand(0).getReg(); in selectInsert() local
[all …]
DX86FixupGadgets.cpp282 const MachineOperand &DstReg = MI.getOperand(CurOp); in isROPFriendly() local
296 const MachineOperand &DstReg = MI.getOperand(CurOp); in isROPFriendly() local
306 const MachineOperand &DstReg = MI.getOperand(CurOp); in isROPFriendly() local
323 const MachineOperand &DstReg = MI.getOperand(CurOp); in isROPFriendly() local
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp126 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
170 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
450 Register DstReg = MI.getOperand(0).getReg(); in expand_DestructiveOp() local
1030 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
1154 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
1189 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
1231 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
1252 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
1297 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
DAArch64RedundantCopyElimination.cpp185 MCPhysReg DstReg = PredI.getOperand(0).getReg(); in knownRegValInBlock() local
251 MCPhysReg DstReg = PredI.getOperand(0).getReg(); in knownRegValInBlock() local
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DTwoAddressInstructionPass.cpp269 Register &SrcReg, Register &DstReg, bool &IsSrcPhys, in isCopyToReg()
350 Register SrcReg, DstReg; in isKilled() local
361 static bool isTwoAddrUse(MachineInstr &MI, Register Reg, Register &DstReg) { in isTwoAddrUse()
380 bool &IsCopy, Register &DstReg, bool &IsDstPhys, in findOnlyInterestingUse()
723 void TwoAddressInstructionPass::scanUses(Register DstReg) { in scanUses()
781 Register SrcReg, DstReg; in processCopy() local
841 Register DstReg; in rescheduleMIBelowKill() local
1026 Register DstReg; in rescheduleKillAboveMI() local
1423 Register DstReg = DstMO.getReg(); in collectTiedOperands() local
1804 Register DstReg = mi->getOperand(DstIdx).getReg(); in runOnMachineFunction() local
[all …]
DExpandPostRAPseudos.cpp69 Register DstReg = MI->getOperand(0).getReg(); in TransferImplicitOperands() local
88 Register DstReg = MI->getOperand(0).getReg(); in LowerSubregToReg() local
DOptimizePHIs.cpp100 Register DstReg = MI->getOperand(0).getReg(); in IsSingleValuePHICycle() local
144 Register DstReg = MI->getOperand(0).getReg(); in IsDeadPHICycle() local
/openbsd/src/gnu/llvm/llvm/lib/Target/BPF/
DBPFMISimplifyPatchable.cpp170 Register &DstReg, const GlobalValue *GVal, bool IsAma) { in processCandidate()
204 Register &DstReg, Register &SrcReg, const GlobalValue *GVal, in processDstReg()
284 Register DstReg = MI.getOperand(0).getReg(); in removeLD() local
/openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
DLegalizationArtifactCombiner.h63 Register DstReg = MI.getOperand(0).getReg(); in tryCombineAnyExt() local
117 Register DstReg = MI.getOperand(0).getReg(); in tryCombineZExt() local
179 Register DstReg = MI.getOperand(0).getReg(); in tryCombineSExt() local
237 Register DstReg = MI.getOperand(0).getReg(); in tryCombineTrunc() local
342 Register DstReg = MI.getOperand(0).getReg(); in tryFoldImplicitDef() local
516 static void replaceRegOrBuildCopy(Register DstReg, Register SrcReg, in replaceRegOrBuildCopy()
1135 Register DstReg = MI.getOperand(Idx).getReg(); in tryCombineUnmergeValues() local
1168 Register DstReg = MI.getOperand(0).getReg(); in tryCombineExtract() local
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DSIFixSGPRCopies.cpp185 Register DstReg = Copy.getOperand(0).getReg(); in getCopyRegClasses() local
221 Register DstReg = MI.getOperand(0).getReg(); in tryChangeVGPRtoSGPRinCopy() local
263 Register DstReg = MI.getOperand(0).getReg(); in foldVGPRCopyIntoRegSequence() local
834 Register DstReg = MI.getOperand(0).getReg(); in lowerSpecialCase() local
890 Register DstReg = MI->getOperand(0).getReg(); in analyzeVGPRToSGPRCopy() local
1029 Register DstReg = MI->getOperand(0).getReg(); in lowerVGPR2SGPRCopies() local
1076 Register DstReg = MI.getOperand(0).getReg(); in fixSCCCopies() local
DR600ExpandSpecialInstrs.cpp126 Register DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
196 Register DstReg = in runOnMachineFunction() local
DSILowerI1Copies.cpp498 Register DstReg = MI.getOperand(0).getReg(); in lowerCopiesFromI1() local
563 Register DstReg = MI->getOperand(0).getReg(); in lowerPhis() local
681 Register DstReg = MI.getOperand(0).getReg(); in lowerCopiesToI1() local
821 const DebugLoc &DL, unsigned DstReg, in buildMergeLaneMasks()
DAMDGPUInstructionSelector.cpp127 Register DstReg = Dst.getReg(); in selectCOPY() local
243 Register DstReg = MRI->createVirtualRegister(&SubRC); in getSubOperand64() local
285 Register DstReg = I.getOperand(0).getReg(); in selectG_AND_OR_XOR() local
308 Register DstReg = I.getOperand(0).getReg(); in selectG_ADD_SUB() local
483 Register DstReg = I.getOperand(0).getReg(); in selectG_EXTRACT() local
582 Register DstReg = MI.getOperand(0).getReg(); in selectG_MERGE_VALUES() local
834 Register DstReg = I.getOperand(0).getReg(); in selectG_INSERT() local
891 Register DstReg = MI.getOperand(0).getReg(); in selectG_SBFX_UBFX() local
1070 Register DstReg = I.getOperand(0).getReg(); in selectG_INTRINSIC() local
1379 Register DstReg = I.getOperand(0).getReg(); in selectBallot() local
[all …]
DAMDGPURegisterBankInfo.cpp123 Register DstReg = MI.getOperand(0).getReg(); in applyBank() local
150 Register DstReg = MI.getOperand(0).getReg(); in applyBank() local
1053 Register DstReg = MI.getOperand(0).getReg(); in applyMappingLoad() local
1461 Register DstReg = MI.getOperand(0).getReg(); in applyMappingBFE() local
1849 bool AMDGPURegisterBankInfo::buildVCopy(MachineIRBuilder &B, Register DstReg, in buildVCopy()
2000 Register DstReg = (NumLanes == 1) ? MI.getOperand(0).getReg() : DstRegs[L]; in foldExtractEltToCmpSelect() local
2124 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
2155 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
2211 Register DstReg = MI.getOperand(BoolDstOp).getReg(); in applyMappingImpl() local
2247 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
[all …]
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
DInstructionSelect.cpp170 Register DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
237 Register DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
DLegalizerHelper.cpp252 void LegalizerHelper::insertParts(Register DstReg, in insertParts()
298 void LegalizerHelper::mergeMixedSubvectors(Register DstReg, in mergeMixedSubvectors()
438 void LegalizerHelper::buildWidenedRemergeToDst(Register DstReg, LLT LCMTy, in buildWidenedRemergeToDst()
915 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
1041 Register DstReg = LoadMI.getDstReg(); in narrowScalar() local
1059 Register DstReg = LoadMI.getDstReg(); in narrowScalar() local
1368 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
1507 Register DstReg = MI.getOperand(0).getReg(); in widenScalarMergeValues() local
1756 Register DstReg = MI.getOperand(0).getReg(); in widenScalarExtract() local
1943 Register DstReg = MI.getOperand(0).getReg(); in widenScalarAddSubShlSat() local
[all …]
DCombinerHelper.cpp210 Register DstReg = MI.getOperand(0).getReg(); in matchCombineCopy() local
215 Register DstReg = MI.getOperand(0).getReg(); in applyCombineCopy() local
280 Register DstReg = MI.getOperand(0).getReg(); in applyCombineConcatVectors() local
385 Register DstReg = MI.getOperand(0).getReg(); in applyCombineShuffleVector() local
838 Register DstReg = MI.getOperand(0).getReg(); in matchSextInRegOfLoad() local
1332 Register DstReg = MI.getOperand(0).getReg(); in matchCombineConstantFoldFpUnary() local
1345 Register DstReg = MI.getOperand(0).getReg(); in applyCombineConstantFoldFpUnary() local
1764 Register DstReg = MI.getOperand(Idx).getReg(); in applyCombineUnmergeMergeToPlainValues() local
1808 Register DstReg = MI.getOperand(Idx).getReg(); in applyCombineUnmergeConstant() local
1822 Register DstReg = MI.getOperand(Idx).getReg(); in matchCombineUnmergeUndef() local
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/GISel/
DAArch64InstructionSelector.cpp888 Register DstReg = I.getOperand(0).getReg(); in getRegClassesForCopy() local
945 Register DstReg = I.getOperand(0).getReg(); in selectCopy() local
1830 Register DstReg = I.getOperand(0).getReg(); in selectVectorSHL() local
1876 Register DstReg = I.getOperand(0).getReg(); in selectVectorAshrLshr() local
1978 Register DstReg = ForceDstReg in materializeLargeCMVal() local
1994 Register DstReg = BuildMovK(MovZ.getReg(0), in materializeLargeCMVal() local
2028 Register DstReg = I.getOperand(0).getReg(); in preISelLower() local
2084 Register DstReg = I.getOperand(0).getReg(); in convertPtrAddToAdd() local
2516 Register DstReg = I.getOperand(0).getReg(); in select() local
2666 Register DstReg = I.getOperand(0).getReg(); in select() local
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCDuplexInfo.cpp190 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
536 unsigned DstReg, SrcReg; in subInstWouldBeExtended() local
/openbsd/src/gnu/llvm/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp746 Register DstReg = I->getOperand(0).getReg(); in expandPseudoMTLoHi() local
763 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
785 Register DstReg = I->getOperand(0).getReg(); in expandExtractElementF64() local
827 Register DstReg = I->getOperand(0).getReg(); in expandBuildPairF64() local
/openbsd/src/gnu/llvm/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp2191 MCOperand &DstReg = Inst.getOperand(0); in processInstruction() local
2707 bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, in loadImmediate()
2885 bool MipsAsmParser::expandLoadAddress(unsigned DstReg, unsigned BaseReg, in expandLoadAddress()
2917 unsigned DstReg, unsigned SrcReg, in loadAndAddSymbolAddress()
3733 unsigned DstReg = DstRegOp.getReg(); in expandMem16Inst() local
3860 unsigned DstReg = DstRegOp.getReg(); in expandMem9Inst() local
4428 unsigned DstReg = DstRegOp.getReg(); in expandUlh() local
4480 unsigned DstReg = DstRegOp.getReg(); in expandUsh() local
4531 unsigned DstReg = DstRegOp.getReg(); in expandUxw() local
4581 unsigned DstReg = Inst.getOperand(0).getReg(); in expandSge() local
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/
DARMExpandPseudoInsts.cpp582 Register DstReg = MI.getOperand(OpIdx++).getReg(); in ExpandVLD() local
791 unsigned DstReg = 0; in ExpandLaneOp() local
978 Register DstReg = MI.getOperand(0).getReg(); in ExpandMOV32BitImm() local
2054 Register DstReg = MI.getOperand(0).getReg(); in ExpandMI() local
2530 Register DstReg = MI.getOperand(0).getReg(); in ExpandMI() local
2553 Register DstReg = MI.getOperand(0).getReg(); in ExpandMI() local
2614 Register DstReg = MI.getOperand(0).getReg(); in ExpandMI() local
2678 Register DstReg = MI.getOperand(OpIdx++).getReg(); in ExpandMI() local

12345