1 /* Definitions of target machine for GNU compiler, for the HP Spectrum. 2 Copyright (C) 1992-2022 Free Software Foundation, Inc. 3 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support 4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for 5 Software Science at the University of Utah. 6 7 This file is part of GCC. 8 9 GCC is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 GCC is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with GCC; see the file COPYING3. If not see 21 <http://www.gnu.org/licenses/>. */ 22 23 /* For long call handling. */ 24 extern unsigned long total_code_bytes; 25 26 #define pa_cpu_attr ((enum attr_cpu)pa_cpu) 27 28 #define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20) 29 30 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */ 31 #ifndef TARGET_64BIT 32 #define TARGET_64BIT 0 33 #endif 34 35 /* Generate code for ELF32 ABI. */ 36 #ifndef TARGET_ELF32 37 #define TARGET_ELF32 0 38 #endif 39 40 /* Generate code for SOM 32bit ABI. */ 41 #ifndef TARGET_SOM 42 #define TARGET_SOM 0 43 #endif 44 45 /* HP-UX UNIX features. */ 46 #ifndef TARGET_HPUX 47 #define TARGET_HPUX 0 48 #endif 49 50 /* HP-UX 10.10 UNIX 95 features. */ 51 #ifndef TARGET_HPUX_10_10 52 #define TARGET_HPUX_10_10 0 53 #endif 54 55 /* HP-UX 11.* features (11.00, 11.11, 11.23, etc.) */ 56 #ifndef TARGET_HPUX_11 57 #define TARGET_HPUX_11 0 58 #endif 59 60 /* HP-UX 11i multibyte and UNIX 98 extensions. */ 61 #ifndef TARGET_HPUX_11_11 62 #define TARGET_HPUX_11_11 0 63 #endif 64 65 /* HP-UX 11i multibyte and UNIX 2003 extensions. */ 66 #ifndef TARGET_HPUX_11_31 67 #define TARGET_HPUX_11_31 0 68 #endif 69 70 /* HP-UX long double library. */ 71 #ifndef HPUX_LONG_DOUBLE_LIBRARY 72 #define HPUX_LONG_DOUBLE_LIBRARY 0 73 #endif 74 75 /* Linux kernel atomic operation support. */ 76 #ifndef TARGET_SYNC_LIBCALL 77 #define TARGET_SYNC_LIBCALL 0 78 #endif 79 80 /* The following three defines are potential target switches. The current 81 defines are optimal given the current capabilities of GAS and GNU ld. */ 82 83 /* Define to a C expression evaluating to true to use long absolute calls. 84 Currently, only the HP assembler and SOM linker support long absolute 85 calls. They are used only in non-pic code. */ 86 #define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS) 87 88 /* Define to a C expression evaluating to true to use long PIC symbol 89 difference calls. Long PIC symbol difference calls are only used with 90 the HP assembler and linker. The HP assembler detects this instruction 91 sequence and treats it as long pc-relative call. Currently, GAS only 92 allows a difference of two symbols in the same subspace, and it doesn't 93 detect the sequence as a pc-relative call. */ 94 #define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS && TARGET_HPUX) 95 96 /* Define to a C expression evaluating to true to use SOM secondary 97 definition symbols for weak support. Linker support for secondary 98 definition symbols is buggy prior to HP-UX 11.X. */ 99 #define TARGET_SOM_SDEF 0 100 101 /* Define to a C expression evaluating to true to save the entry value 102 of SP in the current frame marker. This is normally unnecessary. 103 However, the HP-UX unwind library looks at the SAVE_SP callinfo flag. 104 HP compilers don't use this flag but it is supported by the assembler. 105 We set this flag to indicate that register %r3 has been saved at the 106 start of the frame. Thus, when the HP unwind library is used, we 107 need to generate additional code to save SP into the frame marker. */ 108 #define TARGET_HPUX_UNWIND_LIBRARY 0 109 110 #ifndef TARGET_DEFAULT 111 #define TARGET_DEFAULT MASK_GAS 112 #endif 113 114 #ifndef TARGET_CPU_DEFAULT 115 #define TARGET_CPU_DEFAULT 0 116 #endif 117 118 #ifndef TARGET_SCHED_DEFAULT 119 #define TARGET_SCHED_DEFAULT PROCESSOR_8000 120 #endif 121 122 /* Support for a compile-time default CPU, et cetera. The rules are: 123 --with-schedule is ignored if -mschedule is specified. 124 --with-arch is ignored if -march is specified. */ 125 #define OPTION_DEFAULT_SPECS \ 126 {"arch", "%{!march=*:-march=%(VALUE)}" }, \ 127 {"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" } 128 129 /* Specify the dialect of assembler to use. New mnemonics is dialect one 130 and the old mnemonics are dialect zero. */ 131 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0) 132 133 /* Override some settings from dbxelf.h. */ 134 135 /* We do not have to be compatible with dbx, so we enable gdb extensions 136 by default. */ 137 #define DEFAULT_GDB_EXTENSIONS 1 138 139 /* Select dwarf2 as the preferred debug format. */ 140 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG 141 142 /* This used to be zero (no max length), but big enums and such can 143 cause huge strings which killed gas. 144 145 We also have to avoid lossage in dbxout.cc -- it does not compute the 146 string size accurately, so we are real conservative here. */ 147 #undef DBX_CONTIN_LENGTH 148 #define DBX_CONTIN_LENGTH 3000 149 150 /* GDB always assumes the current function's frame begins at the value 151 of the stack pointer upon entry to the current function. Accessing 152 local variables and parameters passed on the stack is done using the 153 base of the frame + an offset provided by GCC. 154 155 For functions which have frame pointers this method works fine; 156 the (frame pointer) == (stack pointer at function entry) and GCC provides 157 an offset relative to the frame pointer. 158 159 This loses for functions without a frame pointer; GCC provides an offset 160 which is relative to the stack pointer after adjusting for the function's 161 frame size. GDB would prefer the offset to be relative to the value of 162 the stack pointer at the function's entry. Yuk! */ 163 #define DEBUGGER_AUTO_OFFSET(X) \ 164 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \ 165 + (frame_pointer_needed ? 0 : pa_compute_frame_size (get_frame_size (), 0))) 166 167 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \ 168 ((GET_CODE (X) == PLUS ? OFFSET : 0) \ 169 + (frame_pointer_needed ? 0 : pa_compute_frame_size (get_frame_size (), 0))) 170 171 #define TARGET_CPU_CPP_BUILTINS() \ 172 do { \ 173 builtin_assert("cpu=hppa"); \ 174 builtin_assert("machine=hppa"); \ 175 builtin_define("__hppa"); \ 176 builtin_define("__hppa__"); \ 177 builtin_define("__BIG_ENDIAN__"); \ 178 if (TARGET_PA_20) \ 179 builtin_define("_PA_RISC2_0"); \ 180 else if (TARGET_PA_11) \ 181 builtin_define("_PA_RISC1_1"); \ 182 else \ 183 builtin_define("_PA_RISC1_0"); \ 184 if (HPUX_LONG_DOUBLE_LIBRARY) \ 185 builtin_define("__SIZEOF_FLOAT128__=16"); \ 186 } while (0) 187 188 /* An old set of OS defines for various BSD-like systems. */ 189 #define TARGET_OS_CPP_BUILTINS() \ 190 do \ 191 { \ 192 builtin_define_std ("REVARGV"); \ 193 builtin_define_std ("hp800"); \ 194 builtin_define_std ("hp9000"); \ 195 builtin_define_std ("hp9k8"); \ 196 if (!c_dialect_cxx () && !flag_iso) \ 197 builtin_define ("hppa"); \ 198 builtin_define_std ("spectrum"); \ 199 builtin_define_std ("unix"); \ 200 builtin_assert ("system=bsd"); \ 201 builtin_assert ("system=unix"); \ 202 } \ 203 while (0) 204 205 #define CC1_SPEC "%{pg:} %{p:}" 206 207 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}" 208 209 /* We don't want -lg. */ 210 #ifndef LIB_SPEC 211 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" 212 #endif 213 214 /* Make gcc agree with <machine/ansi.h> */ 215 216 #define SIZE_TYPE "unsigned int" 217 #define PTRDIFF_TYPE "int" 218 #define WCHAR_TYPE "unsigned int" 219 #define WCHAR_TYPE_SIZE 32 220 221 /* target machine storage layout */ 222 typedef struct GTY(()) machine_function 223 { 224 /* Flag indicating that a .NSUBSPA directive has been output for 225 this function. */ 226 int in_nsubspa; 227 } machine_function; 228 229 /* Define this macro if it is advisable to hold scalars in registers 230 in a wider mode than that declared by the program. In such cases, 231 the value is constrained to be within the bounds of the declared 232 type, but kept valid in the wider mode. The signedness of the 233 extension may differ from that of the type. */ 234 235 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 236 if (GET_MODE_CLASS (MODE) == MODE_INT \ 237 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 238 (MODE) = word_mode; 239 240 /* Define this if most significant bit is lowest numbered 241 in instructions that operate on numbered bit-fields. */ 242 #define BITS_BIG_ENDIAN 1 243 244 /* Define this if most significant byte of a word is the lowest numbered. */ 245 /* That is true on the HP-PA. */ 246 #define BYTES_BIG_ENDIAN 1 247 248 /* Define this if most significant word of a multiword number is lowest 249 numbered. */ 250 #define WORDS_BIG_ENDIAN 1 251 252 #define MAX_BITS_PER_WORD 64 253 254 /* Width of a word, in units (bytes). */ 255 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 256 257 /* Minimum number of units in a word. If this is undefined, the default 258 is UNITS_PER_WORD. Otherwise, it is the constant value that is the 259 smallest value that UNITS_PER_WORD can have at run-time. 260 261 This needs to be 8 when TARGET_64BIT is true to allow building various 262 TImode routines in libgcc. However, we also need the DImode DIVMOD 263 routines because they are not currently implemented in pa.md. 264 265 The HP runtime specification doesn't provide the alignment requirements 266 and calling conventions for TImode variables. */ 267 #ifdef IN_LIBGCC2 268 #define MIN_UNITS_PER_WORD UNITS_PER_WORD 269 #else 270 #define MIN_UNITS_PER_WORD 4 271 #endif 272 273 /* The widest floating point format supported by the hardware. Note that 274 setting this influences some Ada floating point type sizes, currently 275 required for GNAT to operate properly. */ 276 #define WIDEST_HARDWARE_FP_SIZE 64 277 278 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 279 #define PARM_BOUNDARY BITS_PER_WORD 280 281 /* Largest alignment required for any stack parameter, in bits. 282 Don't define this if it is equal to PARM_BOUNDARY */ 283 #define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT 284 285 /* Boundary (in *bits*) on which stack pointer is always aligned; 286 certain optimizations in combine depend on this. 287 288 The HP-UX runtime documents mandate 64-byte and 16-byte alignment for 289 the stack on the 32 and 64-bit ports, respectively. However, we 290 are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT 291 in main. Thus, we treat the former as the preferred alignment. */ 292 #define STACK_BOUNDARY BIGGEST_ALIGNMENT 293 #define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512) 294 295 /* Allocation boundary (in *bits*) for the code of a function. */ 296 #define FUNCTION_BOUNDARY BITS_PER_WORD 297 298 /* Alignment of field after `int : 0' in a structure. */ 299 #define EMPTY_FIELD_BOUNDARY 32 300 301 /* Every structure's size must be a multiple of this. */ 302 #define STRUCTURE_SIZE_BOUNDARY 8 303 304 /* A bit-field declared as `int' forces `int' alignment for the struct. */ 305 #define PCC_BITFIELD_TYPE_MATTERS 1 306 307 /* No data type wants to be aligned rounder than this. The long double 308 type has 16-byte alignment on the 64-bit target even though it was never 309 implemented in hardware. The software implementation only needs 8-byte 310 alignment. This matches the biggest alignment of the HP compilers. */ 311 #define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD) 312 313 /* Alignment, in bits, a C conformant malloc implementation has to provide. 314 The HP-UX malloc implementation provides a default alignment of 8 bytes. 315 It should be 16 bytes on the 64-bit target since long double has 16-byte 316 alignment. It can be increased with mallopt but it's non critical since 317 long double was never implemented in hardware. The glibc implementation 318 currently provides 8-byte alignment. It should be 16 bytes since various 319 POSIX types such as pthread_mutex_t require 16-byte alignment. Again, 320 this is non critical since 16-byte alignment is no longer needed for 321 atomic operations. */ 322 #define MALLOC_ABI_ALIGNMENT (TARGET_64BIT ? 128 : 64) 323 324 /* Make arrays of chars word-aligned for the same reasons. */ 325 #define DATA_ALIGNMENT(TYPE, ALIGN) \ 326 (TREE_CODE (TYPE) == ARRAY_TYPE \ 327 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 328 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 329 330 /* Set this nonzero if move instructions will actually fail to work 331 when given unaligned data. */ 332 #define STRICT_ALIGNMENT 1 333 334 /* Specify the registers used for certain standard purposes. 335 The values of these macros are register numbers. */ 336 337 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */ 338 /* #define PC_REGNUM */ 339 340 /* Register to use for pushing function arguments. */ 341 #define STACK_POINTER_REGNUM 30 342 343 /* Fixed register for local variable access. Always eliminated. */ 344 #define FRAME_POINTER_REGNUM (TARGET_64BIT ? 61 : 89) 345 346 /* Base register for access to local variables of the function. */ 347 #define HARD_FRAME_POINTER_REGNUM 3 348 349 /* Don't allow hard registers to be renamed into r2 unless r2 350 is already live or already being saved (due to eh). */ 351 352 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ 353 ((NEW_REG) != 2 || df_regs_ever_live_p (2) || crtl->calls_eh_return) 354 355 /* Base register for access to arguments of the function. */ 356 #define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3) 357 358 /* Register in which static-chain is passed to a function. */ 359 #define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29) 360 361 /* Register used to address the offset table for position-independent 362 data references. */ 363 #define PIC_OFFSET_TABLE_REGNUM \ 364 (flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM) 365 366 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1 367 368 /* Function to return the rtx used to save the pic offset table register 369 across function calls. */ 370 extern rtx hppa_pic_save_rtx (void); 371 372 #define DEFAULT_PCC_STRUCT_RETURN 0 373 374 /* Register in which address to store a structure value 375 is passed to a function. */ 376 #define PA_STRUCT_VALUE_REGNUM 28 377 378 /* Definitions for register eliminations. 379 380 We have two registers that can be eliminated. First, the frame pointer 381 register can often be eliminated in favor of the stack pointer register. 382 Secondly, the argument pointer register can always be eliminated in the 383 32-bit runtimes. */ 384 385 /* This is an array of structures. Each structure initializes one pair 386 of eliminable registers. The "from" register number is given first, 387 followed by "to". Eliminations of the same "from" register are listed 388 in order of preference. 389 390 The argument pointer cannot be eliminated in the 64-bit runtime. It 391 is the same register as the hard frame pointer in the 32-bit runtime. 392 So, it does not need to be listed. */ 393 #define ELIMINABLE_REGS \ 394 {{ HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 395 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 396 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM} } 397 398 /* Define the offset between two registers, one to be eliminated, 399 and the other its replacement, at the start of a routine. */ 400 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 401 ((OFFSET) = pa_initial_elimination_offset(FROM, TO)) 402 403 /* Describe how we implement __builtin_eh_return. */ 404 #define EH_RETURN_DATA_REGNO(N) \ 405 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM) 406 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29) 407 #define EH_RETURN_HANDLER_RTX pa_eh_return_handler_rtx () 408 409 /* Offset from the frame pointer register value to the top of stack. */ 410 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0 411 412 /* The maximum number of hard registers that can be saved in the call 413 frame. The soft frame pointer is not included. */ 414 #define DWARF_FRAME_REGISTERS (FIRST_PSEUDO_REGISTER - 1) 415 416 /* A C expression whose value is RTL representing the location of the 417 incoming return address at the beginning of any function, before the 418 prologue. You only need to define this macro if you want to support 419 call frame debugging information like that provided by DWARF 2. */ 420 #define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2)) 421 #define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2)) 422 423 /* A C expression whose value is an integer giving a DWARF 2 column 424 number that may be used as an alternate return column. This should 425 be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general 426 register, but an alternate column needs to be used for signal frames. 427 428 Column 0 is not used but unfortunately its register size is set to 429 4 bytes (sizeof CCmode) so it can't be used on 64-bit targets. */ 430 #define DWARF_ALT_FRAME_RETURN_COLUMN (FIRST_PSEUDO_REGISTER - 1) 431 432 /* This macro chooses the encoding of pointers embedded in the exception 433 handling sections. If at all possible, this should be defined such 434 that the exception handling section will not require dynamic relocations, 435 and so may be read-only. 436 437 Because the HP assembler auto aligns, it is necessary to use 438 DW_EH_PE_aligned. It's not possible to make the data read-only 439 on the HP-UX SOM port since the linker requires fixups for label 440 differences in different sections to be word aligned. However, 441 the SOM linker can do unaligned fixups for absolute pointers. 442 We also need aligned pointers for global and function pointers. 443 444 Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative 445 fixups, the runtime doesn't have a consistent relationship between 446 text and data for dynamically loaded objects. Thus, it's not possible 447 to use pc-relative encoding for pointers on this target. It may be 448 possible to use segment relative encodings but GAS doesn't currently 449 have a mechanism to generate these encodings. For other targets, we 450 use pc-relative encoding for pointers. If the pointer might require 451 dynamic relocation, we make it indirect. */ 452 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ 453 (TARGET_GAS && !TARGET_HPUX \ 454 ? (DW_EH_PE_pcrel \ 455 | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0) \ 456 | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)) \ 457 : (!TARGET_GAS || (GLOBAL) || (CODE) == 2 \ 458 ? DW_EH_PE_aligned : DW_EH_PE_absptr)) 459 460 /* Handle special EH pointer encodings. Absolute, pc-relative, and 461 indirect are handled automatically. We output pc-relative, and 462 indirect pc-relative ourself since we need some special magic to 463 generate pc-relative relocations, and to handle indirect function 464 pointers. */ 465 #define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \ 466 do { \ 467 if (((ENCODING) & 0x70) == DW_EH_PE_pcrel) \ 468 { \ 469 fputs (integer_asm_op (SIZE, FALSE), FILE); \ 470 if ((ENCODING) & DW_EH_PE_indirect) \ 471 output_addr_const (FILE, pa_get_deferred_plabel (ADDR)); \ 472 else \ 473 assemble_name (FILE, XSTR ((ADDR), 0)); \ 474 fputs ("+8-$PIC_pcrel$0", FILE); \ 475 goto DONE; \ 476 } \ 477 } while (0) 478 479 480 /* The class value for index registers, and the one for base regs. */ 481 #define INDEX_REG_CLASS GENERAL_REGS 482 #define BASE_REG_CLASS GENERAL_REGS 483 484 #define FP_REG_CLASS_P(CLASS) \ 485 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS) 486 487 /* True if register is floating-point. */ 488 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST) 489 490 #define MAYBE_FP_REG_CLASS_P(CLASS) \ 491 reg_classes_intersect_p ((CLASS), FP_REGS) 492 493 494 /* Stack layout; function entry, exit and calling. */ 495 496 /* Define this if pushing a word on the stack 497 makes the stack pointer a smaller address. */ 498 /* #define STACK_GROWS_DOWNWARD */ 499 500 /* Believe it or not. */ 501 #define ARGS_GROW_DOWNWARD 1 502 503 /* Define this to nonzero if the nominal address of the stack frame 504 is at the high-address end of the local variables; 505 that is, each additional local variable allocated 506 goes at a more negative offset in the frame. */ 507 #define FRAME_GROWS_DOWNWARD 0 508 509 /* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment 510 of the stack. The default is to align it to STACK_BOUNDARY. */ 511 #define STACK_ALIGNMENT_NEEDED 0 512 513 /* If we generate an insn to push BYTES bytes, 514 this says how many the stack pointer really advances by. 515 On the HP-PA, don't define this because there are no push insns. */ 516 /* #define PUSH_ROUNDING(BYTES) */ 517 518 /* Offset of first parameter from the argument pointer register value. 519 This value will be negated because the arguments grow down. 520 Also note that on STACK_GROWS_UPWARD machines (such as this one) 521 this is the distance from the frame pointer to the end of the first 522 argument, not it's beginning. To get the real offset of the first 523 argument, the size of the argument must be added. */ 524 525 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32) 526 527 /* When a parameter is passed in a register, stack space is still 528 allocated for it. */ 529 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16) 530 531 /* Define this if the above stack space is to be considered part of the 532 space allocated by the caller. */ 533 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 534 535 /* Keep the stack pointer constant throughout the function. 536 This is both an optimization and a necessity: longjmp 537 doesn't behave itself when the stack pointer moves within 538 the function! */ 539 #define ACCUMULATE_OUTGOING_ARGS 1 540 541 /* The weird HPPA calling conventions require a minimum of 48 bytes on 542 the stack: 16 bytes for register saves, and 32 bytes for magic. 543 This is the difference between the logical top of stack and the 544 actual sp. 545 546 On the 64-bit port, the HP C compiler allocates a 48-byte frame 547 marker, although the runtime documentation only describes a 16 548 byte marker. For compatibility, we allocate 48 bytes. */ 549 #define STACK_POINTER_OFFSET \ 550 (TARGET_64BIT ? -(crtl->outgoing_args_size + 48) : poly_int64 (-32)) 551 552 #define STACK_DYNAMIC_OFFSET(FNDECL) \ 553 (TARGET_64BIT \ 554 ? (STACK_POINTER_OFFSET) \ 555 : ((STACK_POINTER_OFFSET) - crtl->outgoing_args_size)) 556 557 558 /* Define a data type for recording info about an argument list 559 during the scan of that argument list. This data type should 560 hold all necessary information about the function itself 561 and about the args processed so far, enough to enable macros 562 such as FUNCTION_ARG to determine where the next arg should go. 563 564 On the HP-PA, the WORDS field holds the number of words 565 of arguments scanned so far (including the invisible argument, 566 if any, which holds the structure-value-address). Thus, 4 or 567 more means all following args should go on the stack. 568 569 The INCOMING field tracks whether this is an "incoming" or 570 "outgoing" argument. 571 572 The INDIRECT field indicates whether this is an indirect 573 call or not. 574 575 The NARGS_PROTOTYPE field indicates that an argument does not 576 have a prototype when it less than or equal to 0. */ 577 578 struct hppa_args {int words, nargs_prototype, incoming, indirect; }; 579 580 #define CUMULATIVE_ARGS struct hppa_args 581 582 /* Initialize a variable CUM of type CUMULATIVE_ARGS 583 for a call to a function whose data type is FNTYPE. 584 For a library call, FNTYPE is 0. */ 585 586 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 587 (CUM).words = 0, \ 588 (CUM).incoming = 0, \ 589 (CUM).indirect = (FNTYPE) && !(FNDECL), \ 590 (CUM).nargs_prototype = (FNTYPE && prototype_p (FNTYPE) \ 591 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \ 592 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \ 593 || pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \ 594 : 0) 595 596 597 598 /* Similar, but when scanning the definition of a procedure. We always 599 set NARGS_PROTOTYPE large so we never return a PARALLEL. */ 600 601 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ 602 (CUM).words = 0, \ 603 (CUM).incoming = 1, \ 604 (CUM).indirect = 0, \ 605 (CUM).nargs_prototype = 1000 606 607 /* Determine where to put an argument to a function. 608 Value is zero to push the argument on the stack, 609 or a hard register in which to store the argument. 610 611 MODE is the argument's machine mode. 612 TYPE is the data type of the argument (as a tree). 613 This is null for libcalls where that information may 614 not be available. 615 CUM is a variable of type CUMULATIVE_ARGS which gives info about 616 the preceding args and about the function being called. 617 NAMED is nonzero if this argument is a named parameter 618 (otherwise it is an extra parameter matching an ellipsis). 619 620 On the HP-PA the first four words of args are normally in registers 621 and the rest are pushed. But any arg that won't entirely fit in regs 622 is pushed. 623 624 Arguments passed in registers are either 1 or 2 words long. 625 626 The caller must make a distinction between calls to explicitly named 627 functions and calls through pointers to functions -- the conventions 628 are different! Calls through pointers to functions only use general 629 registers for the first four argument words. 630 631 Of course all this is different for the portable runtime model 632 HP wants everyone to use for ELF. Ugh. Here's a quick description 633 of how it's supposed to work. 634 635 1) callee side remains unchanged. It expects integer args to be 636 in the integer registers, float args in the float registers and 637 unnamed args in integer registers. 638 639 2) caller side now depends on if the function being called has 640 a prototype in scope (rather than if it's being called indirectly). 641 642 2a) If there is a prototype in scope, then arguments are passed 643 according to their type (ints in integer registers, floats in float 644 registers, unnamed args in integer registers. 645 646 2b) If there is no prototype in scope, then floating point arguments 647 are passed in both integer and float registers. egad. 648 649 FYI: The portable parameter passing conventions are almost exactly like 650 the standard parameter passing conventions on the RS6000. That's why 651 you'll see lots of similar code in rs6000.h. */ 652 653 /* Specify padding for the last element of a block move between registers 654 and memory. 655 656 The 64-bit runtime specifies that objects need to be left justified 657 (i.e., the normal justification for a big endian target). The 32-bit 658 runtime specifies right justification for objects smaller than 64 bits. 659 We use a DImode register in the parallel for 5 to 7 byte structures 660 so that there is only one element. This allows the object to be 661 correctly padded. */ 662 #define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \ 663 targetm.calls.function_arg_padding ((MODE), (TYPE)) 664 665 666 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than 667 as assembly via FUNCTION_PROFILER. Just output a local label. 668 We can't use the function label because the GAS SOM target can't 669 handle the difference of a global symbol and a local symbol. */ 670 671 #ifndef FUNC_BEGIN_PROLOG_LABEL 672 #define FUNC_BEGIN_PROLOG_LABEL "LFBP" 673 #endif 674 675 #define FUNCTION_PROFILER(FILE, LABEL) \ 676 (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL) 677 678 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no) 679 680 /* The profile counter if emitted must come before the prologue. */ 681 #define PROFILE_BEFORE_PROLOGUE 1 682 683 /* We never want final.cc to emit profile counters. When profile 684 counters are required, we have to defer emitting them to the end 685 of the current file. */ 686 #define NO_PROFILE_COUNTERS 1 687 688 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 689 the stack pointer does not matter. The value is tested only in 690 functions that have frame pointers. 691 No definition is equivalent to always zero. */ 692 693 extern int may_call_alloca; 694 695 #define EXIT_IGNORE_STACK \ 696 (maybe_ne (get_frame_size (), 0) \ 697 || cfun->calls_alloca || maybe_ne (crtl->outgoing_args_size, 0)) 698 699 /* Length in units of the trampoline for entering a nested function. */ 700 701 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 64) 702 703 /* Alignment required by the trampoline. */ 704 705 #define TRAMPOLINE_ALIGNMENT BITS_PER_WORD 706 707 /* Minimum length of a cache line. A length of 16 will work on all 708 PA-RISC processors. All PA 1.1 processors have a cache line of 709 32 bytes. Most but not all PA 2.0 processors have a cache line 710 of 64 bytes. As cache flushes are expensive and we don't support 711 PA 1.0, we use a minimum length of 32. */ 712 713 #define MIN_CACHELINE_SIZE 32 714 715 716 /* Addressing modes, and classification of registers for them. 717 718 Using autoincrement addressing modes on PA8000 class machines is 719 not profitable. */ 720 721 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000) 722 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000) 723 724 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000) 725 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000) 726 727 /* Macros to check register numbers against specific register classes. */ 728 729 /* The following macros assume that X is a hard or pseudo reg number. 730 They give nonzero only if X is a hard reg of the suitable class 731 or a pseudo reg currently allocated to a suitable hard reg. 732 Since they use reg_renumber, they are safe only once reg_renumber 733 has been allocated, which happens in reginfo.cc during register 734 allocation. */ 735 736 #define REGNO_OK_FOR_INDEX_P(X) \ 737 ((X) && ((X) < 32 \ 738 || ((X) == FRAME_POINTER_REGNUM) \ 739 || ((X) >= FIRST_PSEUDO_REGISTER \ 740 && reg_renumber \ 741 && (unsigned) reg_renumber[X] < 32))) 742 #define REGNO_OK_FOR_BASE_P(X) \ 743 ((X) && ((X) < 32 \ 744 || ((X) == FRAME_POINTER_REGNUM) \ 745 || ((X) >= FIRST_PSEUDO_REGISTER \ 746 && reg_renumber \ 747 && (unsigned) reg_renumber[X] < 32))) 748 #define REGNO_OK_FOR_FP_P(X) \ 749 (FP_REGNO_P (X) \ 750 || (X >= FIRST_PSEUDO_REGISTER \ 751 && reg_renumber \ 752 && FP_REGNO_P (reg_renumber[X]))) 753 754 /* Now macros that check whether X is a register and also, 755 strictly, whether it is in a specified class. 756 757 These macros are specific to the HP-PA, and may be used only 758 in code for printing assembler insns and in conditions for 759 define_optimization. */ 760 761 /* 1 if X is an fp register. */ 762 763 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) 764 765 /* Maximum number of registers that can appear in a valid memory address. */ 766 767 #define MAX_REGS_PER_ADDRESS 2 768 769 /* TLS symbolic reference. */ 770 #define PA_SYMBOL_REF_TLS_P(X) \ 771 (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (X) != 0) 772 773 /* Recognize any constant value that is a valid address except 774 for symbolic addresses. We get better CSE by rejecting them 775 here and allowing hppa_legitimize_address to break them up. We 776 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */ 777 778 #define CONSTANT_ADDRESS_P(X) \ 779 ((GET_CODE (X) == LABEL_REF \ 780 || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \ 781 || GET_CODE (X) == CONST_INT \ 782 || (GET_CODE (X) == CONST && !tls_referenced_p (X)) \ 783 || GET_CODE (X) == HIGH) \ 784 && (reload_in_progress || reload_completed \ 785 || ! pa_symbolic_expression_p (X))) 786 787 /* A C expression that is nonzero if we are using the new HP assembler. */ 788 789 #ifndef NEW_HP_ASSEMBLER 790 #define NEW_HP_ASSEMBLER 0 791 #endif 792 793 /* The macros below define the immediate range for CONST_INTS on 794 the 64-bit port. Constants in this range can be loaded in three 795 instructions using a ldil/ldo/depdi sequence. Constants outside 796 this range are forced to the constant pool prior to reload. */ 797 798 #define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31) 799 #define MIN_LEGIT_64BIT_CONST_INT \ 800 ((HOST_WIDE_INT)((unsigned HOST_WIDE_INT) -32 << 31)) 801 #define LEGITIMATE_64BIT_CONST_INT_P(X) \ 802 ((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT) 803 804 /* Target flags set on a symbol_ref. */ 805 806 /* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output. */ 807 #define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT) 808 #define SYMBOL_REF_REFERENCED_P(RTX) \ 809 ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0) 810 811 /* Defines for constraints.md. */ 812 813 /* Return 1 iff OP is a scaled or unscaled index address. */ 814 #define IS_INDEX_ADDR_P(OP) \ 815 (GET_CODE (OP) == PLUS \ 816 && GET_MODE (OP) == Pmode \ 817 && (GET_CODE (XEXP (OP, 0)) == MULT \ 818 || GET_CODE (XEXP (OP, 1)) == MULT \ 819 || (REG_P (XEXP (OP, 0)) \ 820 && REG_P (XEXP (OP, 1))))) 821 822 /* Return 1 iff OP is a LO_SUM DLT address. */ 823 #define IS_LO_SUM_DLT_ADDR_P(OP) \ 824 (GET_CODE (OP) == LO_SUM \ 825 && GET_MODE (OP) == Pmode \ 826 && REG_P (XEXP (OP, 0)) \ 827 && REG_OK_FOR_BASE_P (XEXP (OP, 0)) \ 828 && GET_CODE (XEXP (OP, 1)) == UNSPEC) 829 830 /* Nonzero if 14-bit offsets can be used for all loads and stores. 831 This is not possible when generating PA 1.x code as floating point 832 loads and stores only support 5-bit offsets. Note that we do not 833 forbid the use of 14-bit offsets for integer modes. Instead, we 834 use secondary reloads to fix REG+D memory addresses for integer 835 mode floating-point loads and stores. 836 837 FIXME: the ELF32 linker clobbers the LSB of the FP register number 838 in PA 2.0 floating-point insns with long displacements. This is 839 because R_PARISC_DPREL14WR and other relocations like it are not 840 yet supported by GNU ld. For now, we reject long displacements 841 on this target. */ 842 843 #define INT14_OK_STRICT \ 844 (TARGET_SOFT_FLOAT \ 845 || (TARGET_PA_20 && !TARGET_ELF32)) 846 847 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 848 and check its validity for a certain class. 849 We have two alternate definitions for each of them. 850 The usual definition accepts all pseudo regs; the other rejects 851 them unless they have been allocated suitable hard regs. 852 853 Most source files want to accept pseudo regs in the hope that 854 they will get allocated to the class that the insn wants them to be in. 855 Source files for reload pass need to be strict. 856 After reload, it makes no difference, since pseudo regs have 857 been eliminated by then. */ 858 859 /* Nonzero if X is a hard reg that can be used as an index 860 or if it is a pseudo reg. */ 861 #define REG_OK_FOR_INDEX_P(X) \ 862 (REGNO (X) && (REGNO (X) < 32 \ 863 || REGNO (X) == FRAME_POINTER_REGNUM \ 864 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) 865 866 /* Nonzero if X is a hard reg that can be used as a base reg 867 or if it is a pseudo reg. */ 868 #define REG_OK_FOR_BASE_P(X) \ 869 (REGNO (X) && (REGNO (X) < 32 \ 870 || REGNO (X) == FRAME_POINTER_REGNUM \ 871 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) 872 873 /* Nonzero if X is a hard reg that can be used as an index. */ 874 #define STRICT_REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 875 876 /* Nonzero if X is a hard reg that can be used as a base reg. */ 877 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 878 879 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20) 880 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X)) 881 882 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20) 883 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X)) 884 885 #define VAL_U6_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x40) 886 #define INT_U6_BITS(X) VAL_U6_BITS_P (INTVAL (X)) 887 888 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800) 889 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X)) 890 891 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000) 892 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X)) 893 894 #if HOST_BITS_PER_WIDE_INT > 32 895 #define VAL_32_BITS_P(X) \ 896 ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31) \ 897 < (unsigned HOST_WIDE_INT) 2 << 31) 898 #else 899 #define VAL_32_BITS_P(X) 1 900 #endif 901 #define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X)) 902 903 /* These are the modes that we allow for scaled indexing. */ 904 #define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \ 905 ((TARGET_64BIT && (MODE) == DImode) \ 906 || (MODE) == SImode \ 907 || (MODE) == HImode \ 908 || (MODE) == SFmode \ 909 || (MODE) == DFmode) 910 911 /* These are the modes that we allow for unscaled indexing. */ 912 #define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \ 913 ((TARGET_64BIT && (MODE) == DImode) \ 914 || (MODE) == SImode \ 915 || (MODE) == HImode \ 916 || (MODE) == QImode \ 917 || (MODE) == SFmode \ 918 || (MODE) == DFmode) 919 920 /* Try a machine-dependent way of reloading an illegitimate address 921 operand. If we find one, push the reload and jump to WIN. This 922 macro is used in only one place: `find_reloads_address' in reload.cc. */ 923 924 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND_L, WIN) \ 925 do { \ 926 rtx new_ad = pa_legitimize_reload_address (AD, MODE, OPNUM, TYPE, IND_L); \ 927 if (new_ad) \ 928 { \ 929 AD = new_ad; \ 930 goto WIN; \ 931 } \ 932 } while (0) 933 934 935 #define TARGET_ASM_SELECT_SECTION pa_select_section 936 937 /* Return a nonzero value if DECL has a section attribute. */ 938 #define IN_NAMED_SECTION_P(DECL) \ 939 ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \ 940 && DECL_SECTION_NAME (DECL) != NULL) 941 942 /* Define this macro if references to a symbol must be treated 943 differently depending on something about the variable or 944 function named by the symbol (such as what section it is in). 945 946 The macro definition, if any, is executed immediately after the 947 rtl for DECL or other node is created. 948 The value of the rtl will be a `mem' whose address is a 949 `symbol_ref'. 950 951 The usual thing for this macro to do is to a flag in the 952 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified 953 name string in the `symbol_ref' (if one bit is not enough 954 information). 955 956 On the HP-PA we use this to indicate if a symbol is in text or 957 data space. Also, function labels need special treatment. */ 958 959 #define TEXT_SPACE_P(DECL)\ 960 (TREE_CODE (DECL) == FUNCTION_DECL \ 961 || (TREE_CODE (DECL) == VAR_DECL \ 962 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \ 963 && (! DECL_INITIAL (DECL) || ! pa_reloc_needed (DECL_INITIAL (DECL))) \ 964 && !flag_pic) \ 965 || CONSTANT_CLASS_P (DECL)) 966 967 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@') 968 969 /* Specify the machine mode that this machine uses for the index in the 970 tablejump instruction. We use a 32-bit absolute address for non-pic code, 971 and a 32-bit offset for 32 and 64-bit pic code. */ 972 #define CASE_VECTOR_MODE SImode 973 974 /* Jump tables must be 32-bit aligned, no matter the size of the element. */ 975 #define ADDR_VEC_ALIGN(ADDR_VEC) 2 976 977 /* Define this as 1 if `char' should by default be signed; else as 0. */ 978 #define DEFAULT_SIGNED_CHAR 1 979 980 /* Max number of bytes we can move from memory to memory 981 in one reasonably fast instruction. */ 982 #define MOVE_MAX 8 983 984 /* Higher than the default as we prefer to use simple move insns 985 (better scheduling and delay slot filling) and because our 986 built-in block move is really a 2X unrolled loop. 987 988 Believe it or not, this has to be big enough to allow for copying all 989 arguments passed in registers to avoid infinite recursion during argument 990 setup for a function call. Why? Consider how we copy the stack slots 991 reserved for parameters when they may be trashed by a call. */ 992 #define MOVE_RATIO(speed) (TARGET_64BIT ? 8 : 4) 993 994 /* Define if operations between registers always perform the operation 995 on the full register even if a narrower mode is specified. */ 996 #define WORD_REGISTER_OPERATIONS 1 997 998 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 999 will either zero-extend or sign-extend. The value of this macro should 1000 be the code that says which one of the two operations is implicitly 1001 done, UNKNOWN if none. */ 1002 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1003 1004 /* Nonzero if access to memory by bytes is slow and undesirable. */ 1005 #define SLOW_BYTE_ACCESS 1 1006 1007 /* Specify the machine mode that pointers have. 1008 After generation of rtl, the compiler makes no further distinction 1009 between pointers and any other objects of this machine mode. */ 1010 #define Pmode word_mode 1011 1012 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 1013 return the mode to be used for the comparison. For floating-point, CCFPmode 1014 should be used. CC_NOOVmode should be used when the first operand is a 1015 PLUS, MINUS, or NEG. CCmode should be used when no special processing is 1016 needed. */ 1017 #define SELECT_CC_MODE(OP,X,Y) \ 1018 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \ 1019 1020 /* A function address in a call instruction 1021 is a byte address (for indexing purposes) 1022 so give the MEM rtx a byte's mode. */ 1023 #define FUNCTION_MODE SImode 1024 1025 /* Define this if addresses of constant functions 1026 shouldn't be put through pseudo regs where they can be cse'd. 1027 Desirable on machines where ordinary constants are expensive 1028 but a CALL with constant address is cheap. */ 1029 #define NO_FUNCTION_CSE 1 1030 1031 /* Define this to be nonzero if shift instructions ignore all but the low-order 1032 few bits. */ 1033 #define SHIFT_COUNT_TRUNCATED 1 1034 1035 /* Adjust the cost of branches. */ 1036 #define BRANCH_COST(speed_p, predictable_p) (pa_cpu == PROCESSOR_8000 ? 2 : 1) 1037 1038 /* Handling the special cases is going to get too complicated for a macro, 1039 just call `pa_adjust_insn_length' to do the real work. */ 1040 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ 1041 ((LENGTH) = pa_adjust_insn_length ((INSN), (LENGTH))) 1042 1043 /* Millicode insns are actually function calls with some special 1044 constraints on arguments and register usage. 1045 1046 Millicode calls always expect their arguments in the integer argument 1047 registers, and always return their result in %r29 (ret1). They 1048 are expected to clobber their arguments, %r1, %r29, and the return 1049 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else. 1050 1051 This macro tells reorg that the references to arguments and 1052 millicode calls do not appear to happen until after the millicode call. 1053 This allows reorg to put insns which set the argument registers into the 1054 delay slot of the millicode call -- thus they act more like traditional 1055 CALL_INSNs. 1056 1057 Note we cannot consider side effects of the insn to be delayed because 1058 the branch and link insn will clobber the return pointer. If we happened 1059 to use the return pointer in the delay slot of the call, then we lose. 1060 1061 get_attr_type will try to recognize the given insn, so make sure to 1062 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns 1063 in particular. */ 1064 #define INSN_REFERENCES_ARE_DELAYED(X) (pa_insn_refs_are_delayed (X)) 1065 1066 1067 /* Control the assembler format that we output. */ 1068 1069 /* A C string constant describing how to begin a comment in the target 1070 assembler language. The compiler assumes that the comment will end at 1071 the end of the line. */ 1072 1073 #define ASM_COMMENT_START ";" 1074 1075 /* Output to assembler file text saying following lines 1076 may contain character constants, extra white space, comments, etc. */ 1077 1078 #define ASM_APP_ON "" 1079 1080 /* Output to assembler file text saying following lines 1081 no longer contain unusual constructs. */ 1082 1083 #define ASM_APP_OFF "" 1084 1085 /* This is how to output the definition of a user-level label named NAME, 1086 such as the label on a static function or variable NAME. */ 1087 1088 #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1089 do { \ 1090 assemble_name ((FILE), (NAME)); \ 1091 if (TARGET_GAS) \ 1092 fputs (":\n", (FILE)); \ 1093 else \ 1094 fputc ('\n', (FILE)); \ 1095 } while (0) 1096 1097 /* This is how to output a reference to a user-level label named NAME. 1098 `assemble_name' uses this. */ 1099 1100 #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1101 do { \ 1102 const char *xname = (NAME); \ 1103 if (FUNCTION_NAME_P (NAME)) \ 1104 xname += 1; \ 1105 if (xname[0] == '*') \ 1106 xname += 1; \ 1107 else \ 1108 fputs (user_label_prefix, FILE); \ 1109 fputs (xname, FILE); \ 1110 } while (0) 1111 1112 /* This how we output the symbol_ref X. */ 1113 1114 #define ASM_OUTPUT_SYMBOL_REF(FILE,X) \ 1115 do { \ 1116 SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED; \ 1117 assemble_name (FILE, XSTR (X, 0)); \ 1118 } while (0) 1119 1120 /* This is how to store into the string LABEL 1121 the symbol_ref name of an internal numbered label where 1122 PREFIX is the class of label and NUM is the number within the class. 1123 This is suitable for output with `assemble_name'. */ 1124 1125 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ 1126 do \ 1127 { \ 1128 char *__p; \ 1129 (LABEL)[0] = '*'; \ 1130 (LABEL)[1] = (PREFIX)[0]; \ 1131 (LABEL)[2] = '$'; \ 1132 __p = stpcpy (&(LABEL)[3], &(PREFIX)[1]); \ 1133 sprint_ul (__p, (unsigned long) (NUM)); \ 1134 } \ 1135 while (0) 1136 1137 1138 /* Output the definition of a compiler-generated label named NAME. */ 1139 1140 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \ 1141 do { \ 1142 assemble_name_raw ((FILE), (NAME)); \ 1143 if (TARGET_GAS) \ 1144 fputs (":\n", (FILE)); \ 1145 else \ 1146 fputc ('\n', (FILE)); \ 1147 } while (0) 1148 1149 #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label 1150 1151 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ 1152 pa_output_ascii ((FILE), (P), (SIZE)) 1153 1154 /* Jump tables are always placed in the text section. We have to do 1155 this for the HP-UX SOM target as we can't switch sections in the 1156 middle of a function. 1157 1158 On ELF targets, it is possible to put them in the readonly-data section. 1159 This would get the table out of .text and reduce branch lengths. 1160 1161 A downside is that an additional insn (addil) is needed to access 1162 the table when generating PIC code. The address difference table 1163 also has to use 32-bit pc-relative relocations. 1164 1165 The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0" 1166 when using ELF GAS. A simple difference can be used when using 1167 the HP assembler. 1168 1169 The final downside is GDB complains about the nesting of the label 1170 for the table. */ 1171 1172 #define JUMP_TABLES_IN_TEXT_SECTION 1 1173 1174 /* This is how to output an element of a case-vector that is absolute. */ 1175 1176 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1177 fprintf (FILE, "\t.word L$%d\n", VALUE) 1178 1179 /* This is how to output an element of a case-vector that is relative. 1180 Since we always place jump tables in the text section, the difference 1181 is absolute and requires no relocation. */ 1182 1183 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 1184 fprintf (FILE, "\t.word L$%d-L$%d\n", VALUE, REL) 1185 1186 /* This is how to output an absolute case-vector. */ 1187 1188 #define ASM_OUTPUT_ADDR_VEC(LAB,BODY) \ 1189 pa_output_addr_vec ((LAB),(BODY)) 1190 1191 /* This is how to output a relative case-vector. */ 1192 1193 #define ASM_OUTPUT_ADDR_DIFF_VEC(LAB,BODY) \ 1194 pa_output_addr_diff_vec ((LAB),(BODY)) 1195 1196 /* This is how to output an assembler line that says to advance the 1197 location counter to a multiple of 2**LOG bytes. */ 1198 1199 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1200 fprintf (FILE, "\t.align %d\n", (1 << (LOG))) 1201 1202 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1203 fprintf (FILE, "\t.blockz " HOST_WIDE_INT_PRINT_UNSIGNED"\n", \ 1204 (unsigned HOST_WIDE_INT)(SIZE)) 1205 1206 /* This says how to output an assembler line to define an uninitialized 1207 global variable with size SIZE (in bytes) and alignment ALIGN (in bits). 1208 This macro exists to properly support languages like C++ which do not 1209 have common data. */ 1210 1211 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ 1212 pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN) 1213 1214 /* This says how to output an assembler line to define a global common symbol 1215 with size SIZE (in bytes) and alignment ALIGN (in bits). */ 1216 1217 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ 1218 pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN) 1219 1220 /* This says how to output an assembler line to define a local common symbol 1221 with size SIZE (in bytes) and alignment ALIGN (in bits). This macro 1222 controls how the assembler definitions of uninitialized static variables 1223 are output. */ 1224 1225 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ 1226 pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN) 1227 1228 /* All HP assemblers use "!" to separate logical lines. */ 1229 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!') 1230 1231 /* Print operand X (an rtx) in assembler syntax to file FILE. 1232 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1233 For `%' followed by punctuation, CODE is the punctuation and X is null. 1234 1235 On the HP-PA, the CODE can be `r', meaning this is a register-only operand 1236 and an immediate zero should be represented as `r0'. 1237 1238 Several % codes are defined: 1239 O an operation 1240 C compare conditions 1241 N extract conditions 1242 M modifier to handle preincrement addressing for memory refs. 1243 F modifier to handle preincrement addressing for fp memory refs */ 1244 1245 #define PRINT_OPERAND(FILE, X, CODE) pa_print_operand (FILE, X, CODE) 1246 1247 1248 /* Print a memory address as an operand to reference that memory location. */ 1249 1250 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1251 { rtx addr = ADDR; \ 1252 switch (GET_CODE (addr)) \ 1253 { \ 1254 case REG: \ 1255 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \ 1256 break; \ 1257 case PLUS: \ 1258 gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT); \ 1259 fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)), \ 1260 reg_names [REGNO (XEXP (addr, 0))]); \ 1261 break; \ 1262 case LO_SUM: \ 1263 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \ 1264 fputs ("R'", FILE); \ 1265 else if (flag_pic == 0) \ 1266 fputs ("RR'", FILE); \ 1267 else \ 1268 fputs ("RT'", FILE); \ 1269 pa_output_global_address (FILE, XEXP (addr, 1), 0); \ 1270 fputs ("(", FILE); \ 1271 output_operand (XEXP (addr, 0), 0); \ 1272 fputs (")", FILE); \ 1273 break; \ 1274 case CONST_INT: \ 1275 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr)); \ 1276 break; \ 1277 default: \ 1278 output_addr_const (FILE, addr); \ 1279 }} 1280 1281 1282 /* Find the return address associated with the frame given by 1283 FRAMEADDR. */ 1284 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ 1285 (pa_return_addr_rtx (COUNT, FRAMEADDR)) 1286 1287 /* Used to mask out junk bits from the return address, such as 1288 processor state, interrupt status, condition codes and the like. */ 1289 #define MASK_RETURN_ADDR \ 1290 /* The privilege level is in the two low order bits, mask em out \ 1291 of the return address. */ \ 1292 (GEN_INT (-4)) 1293 1294 /* We need a libcall to canonicalize function pointers on TARGET_ELF32. */ 1295 #define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \ 1296 "__canonicalize_funcptr_for_compare" 1297 1298 #ifdef HAVE_AS_TLS 1299 #undef TARGET_HAVE_TLS 1300 #define TARGET_HAVE_TLS true 1301 #endif 1302 1303 /* The maximum offset in bytes for a PA 1.X pc-relative call to the 1304 head of the preceding stub table. A long branch stub is two or three 1305 instructions for non-PIC and PIC, respectively. Import stubs are 1306 seven and five instructions for HP-UX and ELF targets, respectively. 1307 The default stub group size for ELF targets is 217856 bytes. 1308 FIXME: We need an option to set the maximum offset. */ 1309 #define MAX_PCREL17F_OFFSET (TARGET_HPUX ? 198164 : 217856) 1310 1311 #define NEED_INDICATE_EXEC_STACK 0 1312 1313 /* Output default function prologue for hpux. */ 1314 #define TARGET_ASM_FUNCTION_PROLOGUE pa_output_function_prologue 1315