Searched defs:MIa (Results 1 – 6 of 6) sorted by relevance
| /NextBSD/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HD | HexagonMCDuplexInfo.cpp | 599 MCInst const &MIa, bool ExtendedA, in isOrderedDuplexPair()
669 bool HexagonMCInstrInfo::isDuplexPair(MCInst const &MIa, MCInst const &MIb) { in isDuplexPair()
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| HD | HexagonMCCompound.cpp | 338 bool isOrderedCompoundPair(MCInst const &MIa, bool IsExtendedA, in isOrderedCompoundPair()
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| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64LoadStoreOptimizer.cpp | 487 static bool mayAlias(MachineInstr *MIa, MachineInstr *MIb, in mayAlias()
500 static bool mayAlias(MachineInstr *MIa, in mayAlias()
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| HD | AArch64InstrInfo.cpp | 602 AArch64InstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr *MIa, in areMemAccessesTriviallyDisjoint()
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| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | SIInstrInfo.cpp | 1068 bool SIInstrInfo::checkInstOffsetsDoNotOverlap(MachineInstr *MIa, in checkInstOffsetsDoNotOverlap()
1088 bool SIInstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr *MIa, in areMemAccessesTriviallyDisjoint()
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| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | ScheduleDAGInstrs.cpp | 517 const DataLayout &DL, MachineInstr *MIa, in MIsNeedChainEdge()
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