1 /*-
2 * Copyright (c) 2009 Yahoo! Inc.
3 * Copyright (c) 2011-2015 LSI Corp.
4 * Copyright (c) 2013-2016 Avago Technologies
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
29 *
30 * $FreeBSD: head/sys/dev/mpr/mprvar.h 331228 2018-03-19 23:21:45Z mav $
31 */
32
33 #ifndef _MPRVAR_H
34 #define _MPRVAR_H
35
36 #define MPR_DRIVER_VERSION "18.03.00.00-fbsd"
37
38 #define MPR_DB_MAX_WAIT 2500
39
40 #define MPR_REQ_FRAMES 2048
41 #define MPR_PRI_REQ_FRAMES 128
42 #define MPR_EVT_REPLY_FRAMES 32
43 #define MPR_REPLY_FRAMES MPR_REQ_FRAMES
44 #define MPR_CHAIN_FRAMES 16384
45 #define MPR_MAXIO_PAGES (-1)
46 #define MPR_SENSE_LEN SSD_FULL_SIZE
47 #define MPR_MSI_MAX 1
48 #define MPR_MSIX_MAX 96
49 #define MPR_SGE64_SIZE 12
50 #define MPR_SGE32_SIZE 8
51 #define MPR_SGC_SIZE 8
52 #define MPR_DEFAULT_CHAIN_SEG_SIZE 8
53 #define MPR_MAX_CHAIN_ELEMENT_SIZE 16
54
55 /*
56 * PCIe NVMe Specific defines
57 */
58 //SLM-for now just use the same value as a SAS disk
59 #define NVME_QDEPTH MPR_REQ_FRAMES
60 #define PRP_ENTRY_SIZE 8
61 #define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */
62 #define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */
63 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
64 #define HOST_PAGE_SIZE_4K 12
65
66 #define MPR_FUNCTRACE(sc) \
67 mpr_dprint((sc), MPR_TRACE, "%s\n", __func__)
68
69 #define CAN_SLEEP 1
70 #define NO_SLEEP 0
71
72 #define MPR_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */
73 #define MPR_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */
74 #define MPR_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */
75
76 #define IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED 0x2810
77
78 #define MPR_SCSI_RI_INVALID_FRAME (0x00000002)
79
80 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */
81
82 #include <sys/endian.h>
83
84 /*
85 * host mapping related macro definitions
86 */
87 #define MPR_MAPTABLE_BAD_IDX 0xFFFFFFFF
88 #define MPR_DPM_BAD_IDX 0xFFFF
89 #define MPR_ENCTABLE_BAD_IDX 0xFF
90 #define MPR_MAX_MISSING_COUNT 0x0F
91 #define MPR_DEV_RESERVED 0x20000000
92 #define MPR_MAP_IN_USE 0x10000000
93 #define MPR_MAP_BAD_ID 0xFFFFFFFF
94
95 typedef uint8_t u8;
96 typedef uint16_t u16;
97 typedef uint32_t u32;
98 typedef uint64_t u64;
99
100 /**
101 * struct dev_mapping_table - device mapping information
102 * @physical_id: SAS address for drives or WWID for RAID volumes
103 * @device_info: bitfield provides detailed info about the device
104 * @phy_bits: bitfields indicating controller phys
105 * @dpm_entry_num: index of this device in device persistent map table
106 * @dev_handle: device handle for the device pointed by this entry
107 * @id: target id
108 * @missing_count: number of times the device not detected by driver
109 * @hide_flag: Hide this physical disk/not (foreign configuration)
110 * @init_complete: Whether the start of the day checks completed or not
111 * @TLR_bits: Turn TLR support on or off
112 */
113 struct dev_mapping_table {
114 u64 physical_id;
115 u32 device_info;
116 u32 phy_bits;
117 u16 dpm_entry_num;
118 u16 dev_handle;
119 u16 reserved1;
120 u16 id;
121 u8 missing_count;
122 u8 init_complete;
123 u8 TLR_bits;
124 u8 reserved2;
125 };
126
127 /**
128 * struct enc_mapping_table - mapping information about an enclosure
129 * @enclosure_id: Logical ID of this enclosure
130 * @start_index: index to the entry in dev_mapping_table
131 * @phy_bits: bitfields indicating controller phys
132 * @dpm_entry_num: index of this enclosure in device persistent map table
133 * @enc_handle: device handle for the enclosure pointed by this entry
134 * @num_slots: number of slots in the enclosure
135 * @start_slot: Starting slot id
136 * @missing_count: number of times the device not detected by driver
137 * @removal_flag: used to mark the device for removal
138 * @skip_search: used as a flag to include/exclude enclosure for search
139 * @init_complete: Whether the start of the day checks completed or not
140 */
141 struct enc_mapping_table {
142 u64 enclosure_id;
143 u32 start_index;
144 u32 phy_bits;
145 u16 dpm_entry_num;
146 u16 enc_handle;
147 u16 num_slots;
148 u16 start_slot;
149 u8 missing_count;
150 u8 removal_flag;
151 u8 skip_search;
152 u8 init_complete;
153 };
154
155 /**
156 * struct map_removal_table - entries to be removed from mapping table
157 * @dpm_entry_num: index of this device in device persistent map table
158 * @dev_handle: device handle for the device pointed by this entry
159 */
160 struct map_removal_table{
161 u16 dpm_entry_num;
162 u16 dev_handle;
163 };
164
165 typedef struct mpr_fw_diagnostic_buffer {
166 size_t size;
167 uint8_t extended_type;
168 uint8_t buffer_type;
169 uint8_t force_release;
170 uint32_t product_specific[23];
171 uint8_t immediate;
172 uint8_t enabled;
173 uint8_t valid_data;
174 uint8_t owned_by_firmware;
175 uint32_t unique_id;
176 } mpr_fw_diagnostic_buffer_t;
177
178 struct mpr_softc;
179 struct mpr_command;
180 struct mprsas_softc;
181 union ccb;
182 struct mprsas_target;
183 struct mpr_column_map;
184
185 MALLOC_DECLARE(M_MPR);
186
187 typedef void mpr_evt_callback_t(struct mpr_softc *, uintptr_t,
188 MPI2_EVENT_NOTIFICATION_REPLY *reply);
189 typedef void mpr_command_callback_t(struct mpr_softc *, struct mpr_command *cm);
190
191 struct mpr_chain {
192 TAILQ_ENTRY(mpr_chain) chain_link;
193 void *chain;
194 uint64_t chain_busaddr;
195 };
196
197 struct mpr_prp_page {
198 TAILQ_ENTRY(mpr_prp_page) prp_page_link;
199 uint64_t *prp_page;
200 uint64_t prp_page_busaddr;
201 };
202
203 /*
204 * This needs to be at least 2 to support SMP passthrough.
205 */
206 #define MPR_IOVEC_COUNT 2
207
208 struct mpr_command {
209 TAILQ_ENTRY(mpr_command) cm_link;
210 TAILQ_ENTRY(mpr_command) cm_recovery;
211 struct mpr_softc *cm_sc;
212 union ccb *cm_ccb;
213 void *cm_data;
214 u_int cm_length;
215 u_int cm_out_len;
216 struct uio cm_uio;
217 struct iovec cm_iovec[MPR_IOVEC_COUNT];
218 u_int cm_max_segs;
219 u_int cm_sglsize;
220 void *cm_sge;
221 uint8_t *cm_req;
222 uint8_t *cm_reply;
223 uint32_t cm_reply_data;
224 mpr_command_callback_t *cm_complete;
225 void *cm_complete_data;
226 struct mprsas_target *cm_targ;
227 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc;
228 u_int cm_lun;
229 u_int cm_flags;
230 #define MPR_CM_FLAGS_POLLED (1 << 0)
231 #define MPR_CM_FLAGS_COMPLETE (1 << 1)
232 #define MPR_CM_FLAGS_SGE_SIMPLE (1 << 2)
233 #define MPR_CM_FLAGS_DATAOUT (1 << 3)
234 #define MPR_CM_FLAGS_DATAIN (1 << 4)
235 #define MPR_CM_FLAGS_WAKEUP (1 << 5)
236 #define MPR_CM_FLAGS_USE_UIO (1 << 6)
237 #define MPR_CM_FLAGS_SMP_PASS (1 << 7)
238 #define MPR_CM_FLAGS_CHAIN_FAILED (1 << 8)
239 #define MPR_CM_FLAGS_ERROR_MASK MPR_CM_FLAGS_CHAIN_FAILED
240 #define MPR_CM_FLAGS_USE_CCB (1 << 9)
241 #define MPR_CM_FLAGS_SATA_ID_TIMEOUT (1 << 10)
242 u_int cm_state;
243 #define MPR_CM_STATE_FREE 0
244 #define MPR_CM_STATE_BUSY 1
245 #define MPR_CM_STATE_TIMEDOUT 2
246 #define MPR_CM_STATE_INQUEUE 3
247 bus_dmamap_t cm_dmamap;
248 struct scsi_sense_data *cm_sense;
249 uint64_t *nvme_error_response;
250 TAILQ_HEAD(, mpr_chain) cm_chain_list;
251 TAILQ_HEAD(, mpr_prp_page) cm_prp_page_list;
252 uint32_t cm_req_busaddr;
253 bus_addr_t cm_sense_busaddr;
254 struct callout cm_callout;
255 };
256
257 struct mpr_column_map {
258 uint16_t dev_handle;
259 uint8_t phys_disk_num;
260 };
261
262 struct mpr_event_handle {
263 TAILQ_ENTRY(mpr_event_handle) eh_list;
264 mpr_evt_callback_t *callback;
265 void *data;
266 uint8_t mask[16];
267 };
268
269 struct mpr_busdma_context {
270 int completed;
271 int abandoned;
272 int error;
273 bus_addr_t *addr;
274 struct mpr_softc *softc;
275 bus_dmamap_t buffer_dmamap;
276 bus_dma_tag_t buffer_dmat;
277 };
278
279 struct mpr_queue {
280 struct mpr_softc *sc;
281 int qnum;
282 MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
283 int replypostindex;
284 #ifdef notyet
285 ck_ring_buffer_t *ringmem;
286 ck_ring_buffer_t *chainmem;
287 ck_ring_t req_ring;
288 ck_ring_t chain_ring;
289 #endif
290 bus_dma_tag_t buffer_dmat;
291 int io_cmds_highwater;
292 int chain_free_lowwater;
293 int chain_alloc_fail;
294 struct resource *irq;
295 void *intrhand;
296 int irq_rid;
297 };
298
299 struct mpr_softc {
300 device_t mpr_dev;
301 struct cdev *mpr_cdev;
302 u_int mpr_flags;
303 #define MPR_FLAGS_INTX (1 << 0)
304 #define MPR_FLAGS_MSI (1 << 1)
305 #define MPR_FLAGS_BUSY (1 << 2)
306 #define MPR_FLAGS_SHUTDOWN (1 << 3)
307 #define MPR_FLAGS_DIAGRESET (1 << 4)
308 #define MPR_FLAGS_ATTACH_DONE (1 << 5)
309 #define MPR_FLAGS_GEN35_IOC (1 << 6)
310 #define MPR_FLAGS_REALLOCATED (1 << 7)
311 u_int mpr_debug;
312 int msi_msgs;
313 u_int reqframesz;
314 u_int replyframesz;
315 u_int atomic_desc_capable;
316 int tm_cmds_active;
317 int io_cmds_active;
318 int io_cmds_highwater;
319 int chain_free;
320 int max_chains;
321 int max_io_pages;
322 u_int maxio;
323 int chain_free_lowwater;
324 uint32_t chain_frame_size;
325 int prp_buffer_size;
326 int prp_pages_free;
327 int prp_pages_free_lowwater;
328 u_int enable_ssu;
329 int spinup_wait_time;
330 int use_phynum;
331 uint64_t chain_alloc_fail;
332 uint64_t prp_page_alloc_fail;
333 struct sysctl_ctx_list sysctl_ctx;
334 struct sysctl_oid *sysctl_tree;
335 char fw_version[16];
336 struct mpr_command *commands;
337 struct mpr_chain *chains;
338 struct mpr_prp_page *prps;
339 struct callout periodic;
340 struct callout device_check_callout;
341 struct mpr_queue *queues;
342
343 int irq_rid;
344 int irq_type;
345 u_int irq_flags;
346
347 struct mprsas_softc *sassc;
348 TAILQ_HEAD(, mpr_command) req_list;
349 TAILQ_HEAD(, mpr_command) high_priority_req_list;
350 TAILQ_HEAD(, mpr_chain) chain_list;
351 TAILQ_HEAD(, mpr_prp_page) prp_page_list;
352 TAILQ_HEAD(, mpr_command) tm_list;
353 int replypostindex;
354 int replyfreeindex;
355
356 struct resource *mpr_regs_resource;
357 bus_space_handle_t mpr_bhandle;
358 bus_space_tag_t mpr_btag;
359 int mpr_regs_rid;
360
361 bus_dma_tag_t mpr_parent_dmat;
362 bus_dma_tag_t buffer_dmat;
363
364 MPI2_IOC_FACTS_REPLY *facts;
365 int num_reqs;
366 int num_prireqs;
367 int num_replies;
368 int num_chains;
369 int fqdepth; /* Free queue */
370 int pqdepth; /* Post queue */
371
372 uint8_t event_mask[16];
373 TAILQ_HEAD(, mpr_event_handle) event_list;
374 struct mpr_event_handle *mpr_log_eh;
375
376 struct lock mpr_lock;
377 struct intr_config_hook mpr_ich;
378
379 uint8_t *req_frames;
380 bus_addr_t req_busaddr;
381 bus_dma_tag_t req_dmat;
382 bus_dmamap_t req_map;
383
384 uint8_t *reply_frames;
385 bus_addr_t reply_busaddr;
386 bus_dma_tag_t reply_dmat;
387 bus_dmamap_t reply_map;
388
389 struct scsi_sense_data *sense_frames;
390 bus_addr_t sense_busaddr;
391 bus_dma_tag_t sense_dmat;
392 bus_dmamap_t sense_map;
393
394 uint8_t *chain_frames;
395 bus_dma_tag_t chain_dmat;
396 bus_dmamap_t chain_map;
397
398 uint8_t *prp_pages;
399 bus_addr_t prp_page_busaddr;
400 bus_dma_tag_t prp_page_dmat;
401 bus_dmamap_t prp_page_map;
402
403 MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
404 bus_addr_t post_busaddr;
405 uint32_t *free_queue;
406 bus_addr_t free_busaddr;
407 bus_dma_tag_t queues_dmat;
408 bus_dmamap_t queues_map;
409
410 uint8_t *fw_diag_buffer;
411 bus_addr_t fw_diag_busaddr;
412 bus_dma_tag_t fw_diag_dmat;
413 bus_dmamap_t fw_diag_map;
414
415 uint8_t ir_firmware;
416
417 /* static config pages */
418 Mpi2IOCPage8_t ioc_pg8;
419 Mpi2IOUnitPage8_t iounit_pg8;
420
421 /* host mapping support */
422 struct dev_mapping_table *mapping_table;
423 struct enc_mapping_table *enclosure_table;
424 struct map_removal_table *removal_table;
425 uint8_t *dpm_entry_used;
426 uint8_t *dpm_flush_entry;
427 Mpi2DriverMappingPage0_t *dpm_pg0;
428 uint16_t max_devices;
429 uint16_t max_enclosures;
430 uint16_t max_expanders;
431 uint8_t max_volumes;
432 uint8_t num_enc_table_entries;
433 uint8_t num_rsvd_entries;
434 uint16_t max_dpm_entries;
435 uint8_t is_dpm_enable;
436 uint8_t track_mapping_events;
437 uint32_t pending_map_events;
438
439 /* FW diag Buffer List */
440 mpr_fw_diagnostic_buffer_t
441 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
442
443 /* Event Recording IOCTL support */
444 uint32_t events_to_record[4];
445 mpr_event_entry_t recorded_events[MPR_EVENT_QUEUE_SIZE];
446 uint8_t event_index;
447 uint32_t event_number;
448
449 /* EEDP and TLR support */
450 uint8_t eedp_enabled;
451 uint8_t control_TLR;
452
453 /* Shutdown Event Handler */
454 eventhandler_tag shutdown_eh;
455
456 /* To track topo events during reset */
457 #define MPR_DIAG_RESET_TIMEOUT 300000
458 uint8_t wait_for_port_enable;
459 uint8_t port_enable_complete;
460 uint8_t msleep_fake_chan;
461
462 /* StartStopUnit command handling at shutdown */
463 uint32_t SSU_refcount;
464 uint8_t SSU_started;
465
466 /* Configuration tunables */
467 u_int msi_enable;
468 u_int max_reqframes;
469 u_int max_prireqframes;
470 u_int max_replyframes;
471 u_int max_evtframes;
472 char exclude_ids[80];
473
474 struct timeval lastfail;
475 };
476
477 struct mpr_config_params {
478 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr;
479 u_int action;
480 u_int page_address; /* Attributes, not a phys address */
481 u_int status;
482 void *buffer;
483 u_int length;
484 int timeout;
485 void (*callback)(struct mpr_softc *, struct mpr_config_params *);
486 void *cbdata;
487 };
488
489 struct scsi_read_capacity_eedp
490 {
491 uint8_t addr[8];
492 uint8_t length[4];
493 uint8_t protect;
494 };
495
496 static __inline uint32_t
mpr_regread(struct mpr_softc * sc,uint32_t offset)497 mpr_regread(struct mpr_softc *sc, uint32_t offset)
498 {
499 return (bus_space_read_4(sc->mpr_btag, sc->mpr_bhandle, offset));
500 }
501
502 static __inline void
mpr_regwrite(struct mpr_softc * sc,uint32_t offset,uint32_t val)503 mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val)
504 {
505 bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val);
506 }
507
508 /* free_queue must have Little Endian address
509 * TODO- cm_reply_data is unwanted. We can remove it.
510 * */
511 static __inline void
mpr_free_reply(struct mpr_softc * sc,uint32_t busaddr)512 mpr_free_reply(struct mpr_softc *sc, uint32_t busaddr)
513 {
514 if (++sc->replyfreeindex >= sc->fqdepth)
515 sc->replyfreeindex = 0;
516 sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
517 mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
518 }
519
520 static __inline struct mpr_chain *
mpr_alloc_chain(struct mpr_softc * sc)521 mpr_alloc_chain(struct mpr_softc *sc)
522 {
523 struct mpr_chain *chain;
524
525 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
526 TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
527 sc->chain_free--;
528 if (sc->chain_free < sc->chain_free_lowwater)
529 sc->chain_free_lowwater = sc->chain_free;
530 } else
531 sc->chain_alloc_fail++;
532 return (chain);
533 }
534
535 static __inline void
mpr_free_chain(struct mpr_softc * sc,struct mpr_chain * chain)536 mpr_free_chain(struct mpr_softc *sc, struct mpr_chain *chain)
537 {
538 #if 0
539 bzero(chain->chain, 128);
540 #endif
541 sc->chain_free++;
542 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
543 }
544
545 static __inline struct mpr_prp_page *
mpr_alloc_prp_page(struct mpr_softc * sc)546 mpr_alloc_prp_page(struct mpr_softc *sc)
547 {
548 struct mpr_prp_page *prp_page;
549
550 if ((prp_page = TAILQ_FIRST(&sc->prp_page_list)) != NULL) {
551 TAILQ_REMOVE(&sc->prp_page_list, prp_page, prp_page_link);
552 sc->prp_pages_free--;
553 if (sc->prp_pages_free < sc->prp_pages_free_lowwater)
554 sc->prp_pages_free_lowwater = sc->prp_pages_free;
555 } else
556 sc->prp_page_alloc_fail++;
557 return (prp_page);
558 }
559
560 static __inline void
mpr_free_prp_page(struct mpr_softc * sc,struct mpr_prp_page * prp_page)561 mpr_free_prp_page(struct mpr_softc *sc, struct mpr_prp_page *prp_page)
562 {
563 sc->prp_pages_free++;
564 TAILQ_INSERT_TAIL(&sc->prp_page_list, prp_page, prp_page_link);
565 }
566
567 static __inline void
mpr_free_command(struct mpr_softc * sc,struct mpr_command * cm)568 mpr_free_command(struct mpr_softc *sc, struct mpr_command *cm)
569 {
570 struct mpr_chain *chain, *chain_temp;
571 struct mpr_prp_page *prp_page, *prp_page_temp;
572
573 KASSERT(cm->cm_state == MPR_CM_STATE_BUSY, ("state not busy\n"));
574
575 if (cm->cm_reply != NULL)
576 mpr_free_reply(sc, cm->cm_reply_data);
577 cm->cm_reply = NULL;
578 cm->cm_flags = 0;
579 cm->cm_complete = NULL;
580 cm->cm_complete_data = NULL;
581 cm->cm_ccb = NULL;
582 cm->cm_targ = NULL;
583 cm->cm_max_segs = 0;
584 cm->cm_lun = 0;
585 cm->cm_state = MPR_CM_STATE_FREE;
586 cm->cm_data = NULL;
587 cm->cm_length = 0;
588 cm->cm_out_len = 0;
589 cm->cm_sglsize = 0;
590 cm->cm_sge = NULL;
591
592 TAILQ_FOREACH_MUTABLE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
593 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
594 mpr_free_chain(sc, chain);
595 }
596 TAILQ_FOREACH_MUTABLE(prp_page, &cm->cm_prp_page_list, prp_page_link,
597 prp_page_temp) {
598 TAILQ_REMOVE(&cm->cm_prp_page_list, prp_page, prp_page_link);
599 mpr_free_prp_page(sc, prp_page);
600 }
601 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
602 }
603
604 static __inline struct mpr_command *
mpr_alloc_command(struct mpr_softc * sc)605 mpr_alloc_command(struct mpr_softc *sc)
606 {
607 struct mpr_command *cm;
608
609 cm = TAILQ_FIRST(&sc->req_list);
610 if (cm == NULL)
611 return (NULL);
612
613 KASSERT(cm->cm_state == MPR_CM_STATE_FREE,
614 ("mpr: Allocating busy command\n"));
615
616 TAILQ_REMOVE(&sc->req_list, cm, cm_link);
617 cm->cm_state = MPR_CM_STATE_BUSY;
618 return (cm);
619 }
620
621 static __inline void
mpr_free_high_priority_command(struct mpr_softc * sc,struct mpr_command * cm)622 mpr_free_high_priority_command(struct mpr_softc *sc, struct mpr_command *cm)
623 {
624 struct mpr_chain *chain, *chain_temp;
625
626 KASSERT(cm->cm_state == MPR_CM_STATE_BUSY, ("state not busy\n"));
627
628 if (cm->cm_reply != NULL)
629 mpr_free_reply(sc, cm->cm_reply_data);
630 cm->cm_reply = NULL;
631 cm->cm_flags = 0;
632 cm->cm_complete = NULL;
633 cm->cm_complete_data = NULL;
634 cm->cm_ccb = NULL;
635 cm->cm_targ = NULL;
636 cm->cm_lun = 0;
637 cm->cm_state = MPR_CM_STATE_FREE;
638 TAILQ_FOREACH_MUTABLE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
639 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
640 mpr_free_chain(sc, chain);
641 }
642 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
643 }
644
645 static __inline struct mpr_command *
mpr_alloc_high_priority_command(struct mpr_softc * sc)646 mpr_alloc_high_priority_command(struct mpr_softc *sc)
647 {
648 struct mpr_command *cm;
649
650 cm = TAILQ_FIRST(&sc->high_priority_req_list);
651 if (cm == NULL)
652 return (NULL);
653
654 KASSERT(cm->cm_state == MPR_CM_STATE_FREE,
655 ("mpr: Allocating busy command\n"));
656
657 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
658 cm->cm_state = MPR_CM_STATE_BUSY;
659 return (cm);
660 }
661
662 static __inline void
mpr_lock(struct mpr_softc * sc)663 mpr_lock(struct mpr_softc *sc)
664 {
665 lockmgr(&sc->mpr_lock, LK_EXCLUSIVE);
666 }
667
668 static __inline void
mpr_unlock(struct mpr_softc * sc)669 mpr_unlock(struct mpr_softc *sc)
670 {
671 lockmgr(&sc->mpr_lock, LK_RELEASE);
672 }
673
674 #define MPR_INFO (1 << 0) /* Basic info */
675 #define MPR_FAULT (1 << 1) /* Hardware faults */
676 #define MPR_EVENT (1 << 2) /* Event data from the controller */
677 #define MPR_LOG (1 << 3) /* Log data from the controller */
678 #define MPR_RECOVERY (1 << 4) /* Command error recovery tracing */
679 #define MPR_ERROR (1 << 5) /* Parameter errors, programming bugs */
680 #define MPR_INIT (1 << 6) /* Things related to system init */
681 #define MPR_XINFO (1 << 7) /* More detailed/noisy info */
682 #define MPR_USER (1 << 8) /* Trace user-generated commands */
683 #define MPR_MAPPING (1 << 9) /* Trace device mappings */
684 #define MPR_TRACE (1 << 10) /* Function-by-function trace */
685
686 #define MPR_SSU_DISABLE_SSD_DISABLE_HDD 0
687 #define MPR_SSU_ENABLE_SSD_DISABLE_HDD 1
688 #define MPR_SSU_DISABLE_SSD_ENABLE_HDD 2
689 #define MPR_SSU_ENABLE_SSD_ENABLE_HDD 3
690
691 #define mpr_printf(sc, args...) \
692 device_printf((sc)->mpr_dev, ##args)
693
694 #define mpr_print_field(sc, msg, args...) \
695 kprintf("\t" msg, ##args)
696
697 #define mpr_vprintf(sc, args...) \
698 do { \
699 if (bootverbose) \
700 mpr_printf(sc, ##args); \
701 } while (0)
702
703 #define mpr_dprint(sc, level, msg, args...) \
704 do { \
705 if ((sc)->mpr_debug & (level)) \
706 device_printf((sc)->mpr_dev, msg, ##args); \
707 } while (0)
708
709 #define MPR_PRINTFIELD_START(sc, tag...) \
710 mpr_printf((sc), ##tag); \
711 mpr_print_field((sc), ":\n")
712 #define MPR_PRINTFIELD_END(sc, tag) \
713 mpr_printf((sc), tag "\n")
714 #define MPR_PRINTFIELD(sc, facts, attr, fmt) \
715 mpr_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
716
717 static __inline void
mpr_from_u64(uint64_t data,U64 * mpr)718 mpr_from_u64(uint64_t data, U64 *mpr)
719 {
720 (mpr)->High = htole32((uint32_t)((data) >> 32));
721 (mpr)->Low = htole32((uint32_t)((data) & 0xffffffff));
722 }
723
724 static __inline uint64_t
mpr_to_u64(U64 * data)725 mpr_to_u64(U64 *data)
726 {
727 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
728 }
729
730 static __inline void
mpr_mask_intr(struct mpr_softc * sc)731 mpr_mask_intr(struct mpr_softc *sc)
732 {
733 uint32_t mask;
734
735 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
736 mask |= MPI2_HIM_REPLY_INT_MASK;
737 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
738 }
739
740 static __inline void
mpr_unmask_intr(struct mpr_softc * sc)741 mpr_unmask_intr(struct mpr_softc *sc)
742 {
743 uint32_t mask;
744
745 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
746 mask &= ~MPI2_HIM_REPLY_INT_MASK;
747 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
748 }
749
750 int mpr_pci_setup_interrupts(struct mpr_softc *sc);
751 void mpr_pci_free_interrupts(struct mpr_softc *sc);
752 int mpr_pci_restore(struct mpr_softc *sc);
753
754 void mpr_get_tunables(struct mpr_softc *sc);
755 int mpr_attach(struct mpr_softc *sc);
756 int mpr_free(struct mpr_softc *sc);
757 void mpr_intr(void *);
758 void mpr_intr_msi(void *);
759 void mpr_intr_locked(void *);
760 int mpr_register_events(struct mpr_softc *, uint8_t *, mpr_evt_callback_t *,
761 void *, struct mpr_event_handle **);
762 int mpr_restart(struct mpr_softc *);
763 int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *, uint8_t *);
764 int mpr_deregister_events(struct mpr_softc *, struct mpr_event_handle *);
765 void mpr_build_nvme_prp(struct mpr_softc *sc, struct mpr_command *cm,
766 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, void *data,
767 uint32_t data_in_sz, uint32_t data_out_sz);
768 int mpr_push_sge(struct mpr_command *, MPI2_SGE_SIMPLE64 *, size_t, int);
769 int mpr_push_ieee_sge(struct mpr_command *, void *, int);
770 int mpr_add_dmaseg(struct mpr_command *, vm_paddr_t, size_t, u_int, int);
771 int mpr_attach_sas(struct mpr_softc *sc);
772 int mpr_detach_sas(struct mpr_softc *sc);
773 int mpr_read_config_page(struct mpr_softc *, struct mpr_config_params *);
774 int mpr_write_config_page(struct mpr_softc *, struct mpr_config_params *);
775 void mpr_memaddr_cb(void *, bus_dma_segment_t *, int , int );
776 void mpr_memaddr_wait_cb(void *, bus_dma_segment_t *, int , int );
777 void mpr_init_sge(struct mpr_command *cm, void *req, void *sge);
778 int mpr_attach_user(struct mpr_softc *);
779 void mpr_detach_user(struct mpr_softc *);
780 void mprsas_record_event(struct mpr_softc *sc,
781 MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
782
783 int mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm);
784 int mpr_wait_command(struct mpr_softc *sc, struct mpr_command **cm, int timeout,
785 int sleep_flag);
786 int mpr_request_polled(struct mpr_softc *sc, struct mpr_command **cm);
787
788 int mpr_config_get_bios_pg3(struct mpr_softc *sc, Mpi2ConfigReply_t
789 *mpi_reply, Mpi2BiosPage3_t *config_page);
790 int mpr_config_get_raid_volume_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
791 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
792 int mpr_config_get_ioc_pg8(struct mpr_softc *sc, Mpi2ConfigReply_t *,
793 Mpi2IOCPage8_t *);
794 int mpr_config_get_iounit_pg8(struct mpr_softc *sc,
795 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page);
796 int mpr_config_get_sas_device_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
797 Mpi2SasDevicePage0_t *, u32 , u16 );
798 int mpr_config_get_pcie_device_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
799 *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle);
800 int mpr_config_get_pcie_device_pg2(struct mpr_softc *sc, Mpi2ConfigReply_t
801 *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle);
802 int mpr_config_get_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
803 Mpi2DriverMappingPage0_t *, u16 );
804 int mpr_config_get_raid_volume_pg1(struct mpr_softc *sc,
805 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
806 u16 handle);
807 int mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle,
808 u64 *wwid);
809 int mpr_config_get_raid_pd_pg0(struct mpr_softc *sc,
810 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
811 u32 page_address);
812 void mprsas_ir_shutdown(struct mpr_softc *sc);
813
814 int mpr_reinit(struct mpr_softc *sc);
815 void mprsas_handle_reinit(struct mpr_softc *sc);
816
817 void mpr_base_static_config_pages(struct mpr_softc *sc);
818
819 int mpr_mapping_initialize(struct mpr_softc *);
820 void mpr_mapping_topology_change_event(struct mpr_softc *,
821 Mpi2EventDataSasTopologyChangeList_t *);
822 void mpr_mapping_pcie_topology_change_event(struct mpr_softc *sc,
823 Mpi26EventDataPCIeTopologyChangeList_t *event_data);
824 void mpr_mapping_free_memory(struct mpr_softc *sc);
825 int mpr_config_set_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
826 Mpi2DriverMappingPage0_t *, u16 );
827 void mpr_mapping_exit(struct mpr_softc *);
828 void mpr_mapping_check_devices(void *);
829 int mpr_mapping_allocate_memory(struct mpr_softc *sc);
830 unsigned int mpr_mapping_get_tid(struct mpr_softc *, uint64_t , u16);
831 unsigned int mpr_mapping_get_tid_from_handle(struct mpr_softc *sc,
832 u16 handle);
833 unsigned int mpr_mapping_get_raid_tid(struct mpr_softc *sc, u64 wwid,
834 u16 volHandle);
835 unsigned int mpr_mapping_get_raid_tid_from_handle(struct mpr_softc *sc,
836 u16 volHandle);
837 void mpr_mapping_enclosure_dev_status_change_event(struct mpr_softc *,
838 Mpi2EventDataSasEnclDevStatusChange_t *event_data);
839 void mpr_mapping_ir_config_change_event(struct mpr_softc *sc,
840 Mpi2EventDataIrConfigChangeList_t *event_data);
841
842 void mprsas_evt_handler(struct mpr_softc *sc, uintptr_t data,
843 MPI2_EVENT_NOTIFICATION_REPLY *event);
844 void mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle);
845 void mprsas_prepare_volume_remove(struct mprsas_softc *sassc, uint16_t handle);
846 int mprsas_startup(struct mpr_softc *sc);
847 struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *, int,
848 uint16_t);
849 void mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets);
850 struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc);
851 void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm);
852 void mprsas_release_simq_reinit(struct mprsas_softc *sassc);
853 int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm,
854 uint8_t type);
855
856 SYSCTL_DECL(_hw_mpr);
857
858 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
859 kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
860 #define mpr_kproc_exit(arg) kthread_exit(arg)
861
862 #if defined(CAM_PRIORITY_XPT)
863 #define MPR_PRIORITY_XPT CAM_PRIORITY_XPT
864 #else
865 #define MPR_PRIORITY_XPT 5
866 #endif
867
868 #if 1 /* __FreeBSD_version < 800107 */
869 // Prior to FreeBSD-8.0 scp3_flags was not defined.
870 #define spc3_flags reserved
871
872 #define SPC3_SID_PROTECT 0x01
873 #define SPC3_SID_3PC 0x08
874 #define SPC3_SID_TPGS_MASK 0x30
875 #define SPC3_SID_TPGS_IMPLICIT 0x10
876 #define SPC3_SID_TPGS_EXPLICIT 0x20
877 #define SPC3_SID_ACC 0x40
878 #define SPC3_SID_SCCS 0x80
879
880 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
881 #endif
882
883 /* Definitions for SCSI unmap translation to NVMe DSM command */
884
885 /* UNMAP block descriptor structure */
886 struct unmap_blk_desc {
887 uint64_t slba;
888 uint32_t nlb;
889 uint32_t resv;
890 };
891
892 /* UNMAP command's data */
893 struct unmap_parm_list {
894 uint16_t unmap_data_len;
895 uint16_t unmap_blk_desc_data_len;
896 uint32_t resv;
897 struct unmap_blk_desc desc[0];
898 };
899
900 /* SCSI ADDITIONAL SENSE Codes */
901 #define FIXED_SENSE_DATA 0x70
902 #define SCSI_ASC_NO_SENSE 0x00
903 #define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
904 #define SCSI_ASC_LUN_NOT_READY 0x04
905 #define SCSI_ASC_WARNING 0x0B
906 #define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
907 #define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
908 #define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
909 #define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
910 #define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
911 #define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
912 #define SCSI_ASC_ILLEGAL_COMMAND 0x20
913 #define SCSI_ASC_ILLEGAL_BLOCK 0x21
914 #define SCSI_ASC_INVALID_CDB 0x24
915 #define SCSI_ASC_INVALID_LUN 0x25
916 #define SCSI_ASC_INVALID_PARAMETER 0x26
917 #define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
918 #define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
919
920 /* SCSI ADDITIONAL SENSE Code Qualifiers */
921 #define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
922 #define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
923 #define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
924 #define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
925 #define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
926 #define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
927 #define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
928 #define SCSI_ASCQ_INVALID_LUN_ID 0x09
929
930 #endif
931
932