| /openbsd/src/gnu/gcc/gcc/config/bfin/ |
| D | lib1funcs.asm | 88 R3 = 0; define
93 R3 = ROT R3 BY 1; define
|
| /openbsd/src/lib/libcrypto/md5/asm/ |
| D | md5-586.pl | 141 sub R3 subroutine
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| /openbsd/src/lib/libm/src/ld128/ |
| D | s_log1pl.c | 103 R3 = -2.024301798136027039250415126250455056397E3L, variable
|
| /openbsd/src/sys/lib/libsa/ |
| D | sha1.c | 43 #define R3(v,w,x,y,z,i) z+=(((w|x)&y)|(w&x))+blk(i)+0x8F1BBCDC+rol(v,5);w=rol(w,30); macro
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| /openbsd/src/lib/libc/hash/ |
| D | sha1.c | 42 #define R3(v,w,x,y,z,i) z+=(((w|x)&y)|(w&x))+blk(i)+0x8F1BBCDC+rol(v,5);w=rol(w,30); macro
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| /openbsd/src/sys/crypto/ |
| D | sha1.c | 44 #define R3(v,w,x,y,z,i) z+=(((w|x)&y)|(w&x))+blk(i)+0x8F1BBCDC+rol(v,5);w=rol(w,30); macro
|
| /openbsd/src/gnu/usr.bin/binutils/opcodes/ |
| D | ia64-opc.h | 71 #define R3 IA64_OPND_R3 macro
|
| D | v850-opc.c | 500 #define R3 (D16_16 + 1) macro
|
| /openbsd/src/gnu/usr.bin/binutils-2.17/opcodes/ |
| D | ia64-opc.h | 72 #define R3 IA64_OPND_R3 macro
|
| D | v850-opc.c | 425 #define R3 (D16_16 + 1) macro
|
| /openbsd/src/gnu/usr.bin/binutils/gdb/ |
| D | m32r-stub.c | 121 { R0, R1, R2, R3, R4, R5, R6, R7, enumerator
|
| D | sh-stub.c | 263 R0, R1, R2, R3, R4, R5, R6, R7, enumerator
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonBitTracker.cpp | 815 RegisterCell R3 = cop(3, W0); in evaluate() local
|
| D | HexagonConstPropagation.cpp | 2978 RegisterSubReg R3(MI.getOperand(3)); in rewriteHexConstUses() local
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 5504 Register R3 = MRI.createGenericVirtualRegister(S32); in legalizeBVHIntrinsic() local
|
| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 5974 Register R3) { in lowerRotate()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 30700 SDValue R3 = DAG.getNode(ShOpc, dl, VT, R, DAG.getBitcast(VT, Amt3)); in LowerShift() local
|