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Searched defs:Scale (Results 1 – 25 of 55) sorted by relevance

123

/NextBSD/contrib/llvm/include/llvm/Support/
HDScaledNumber.h53 inline std::pair<DigitsT, int16_t> getRounded(DigitsT Digits, int16_t Scale, in getRounded()
65 inline std::pair<uint32_t, int16_t> getRounded32(uint32_t Digits, int16_t Scale, in getRounded32()
71 inline std::pair<uint64_t, int16_t> getRounded64(uint64_t Digits, int16_t Scale, in getRounded64()
189 inline std::pair<int32_t, int> getLgImpl(DigitsT Digits, int16_t Scale) { in getLgImpl()
214 template <class DigitsT> int32_t getLg(DigitsT Digits, int16_t Scale) { in getLg()
223 template <class DigitsT> int32_t getLgFloor(DigitsT Digits, int16_t Scale) { in getLgFloor()
233 template <class DigitsT> int32_t getLgCeiling(DigitsT Digits, int16_t Scale) { in getLgCeiling()
343 int16_t Scale = matchScales(LDigits, LScale, RDigits, RScale); in getSum() local
508 int16_t Scale; variable
513 ScaledNumber(DigitsType Digits, int16_t Scale) in ScaledNumber()
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86ISelDAGToDAG.cpp62 unsigned Scale; member
245 SDValue &Base, SDValue &Scale, in getAddressOperands()
1343 SDValue &Scale, SDValue &Index, in SelectVectorAddr()
1386 SDValue &Scale, SDValue &Index, in SelectAddr()
1432 SDValue &Scale, SDValue &Index, in SelectScalarSSELoad()
1499 SDValue &Scale, SDValue &Index, in SelectLEA64_32Addr()
1539 SDValue &Base, SDValue &Scale, in SelectLEAAddr()
1601 SDValue &Scale, SDValue &Index, in SelectTLSADDRAddr()
1625 SDValue &Base, SDValue &Scale, in TryFoldLoad()
1843 SDValue Base, Scale, Index, Disp, Segment; in SelectAtomicLoadArith() local
[all …]
HDX86InstrBuilder.h48 unsigned Scale; member
/NextBSD/contrib/llvm/lib/CodeGen/
HDMachineBranchProbabilityInfo.cpp109 uint32_t Scale = 1; in getEdgeProbability() local
/NextBSD/contrib/llvm/lib/Analysis/
HDBasicAliasAnalysis.cpp174 int64_t Scale; member
196 static Value *GetLinearExpression(Value *V, APInt &Scale, APInt &Offset, in GetLinearExpression()
356 uint64_t Scale = DL.getTypeAllocSize(*GTI); in DecomposeGEPExpression() local
1483 int64_t Scale = Src[i].Scale; in GetIndexDifference() local
HDTargetTransformInfo.cpp103 int64_t Scale, in isLegalAddressingMode()
122 int64_t Scale, in getScalingFactorCost()
/NextBSD/contrib/llvm/tools/clang/lib/CodeGen/
HDCodeGenPGO.cpp828 static uint32_t scaleBranchWeight(uint64_t Weight, uint64_t Scale) { in scaleBranchWeight()
842 uint64_t Scale = calculateWeightScale(std::max(TrueCount, FalseCount)); in createProfileWeights() local
861 uint64_t Scale = calculateWeightScale(MaxWeight); in createProfileWeights() local
/NextBSD/contrib/llvm/include/llvm/Analysis/
HDTargetTransformInfoImpl.h203 bool HasBaseReg, int64_t Scale, in isLegalAddressingMode()
215 bool HasBaseReg, int64_t Scale, unsigned AddrSpace) { in getScalingFactorCost()
HDTargetTransformInfo.h686 bool HasBaseReg, int64_t Scale, in isLegalAddressingMode()
698 bool HasBaseReg, int64_t Scale, in getScalingFactorCost()
/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMBaseRegisterInfo.cpp437 int Scale = 1; in getFrameIndexInstrOffset() local
637 unsigned Scale = 1; in isFrameOffsetLegal() local
HDARMConstantIslandPass.cpp754 unsigned Scale = 1; in initializeFunctionInfo() local
813 unsigned Scale = 1; in initializeFunctionInfo() local
1812 unsigned Scale = 1; in optimizeThumb2Instructions() local
1871 unsigned Scale = 1; in optimizeThumb2Branches() local
HDThumb2InstrInfo.cpp550 unsigned Scale = 1; in rewriteT2FrameIndex() local
HDARMLoadStoreOptimizer.cpp1021 unsigned Scale = (MI->getOpcode() == ARM::tSUBspi || in isMatchingDecrement() local
1056 unsigned Scale = (MI->getOpcode() == ARM::tADDspi || in isMatchingIncrement() local
1943 unsigned Scale = 1; in CanFormLdStDWord() local
HDThumbRegisterInfo.cpp381 unsigned Scale = 4; in rewriteFrameIndex() local
/NextBSD/contrib/llvm/include/llvm/CodeGen/
HDBasicTTIImpl.h122 bool HasBaseReg, int64_t Scale, in isLegalAddressingMode()
133 bool HasBaseReg, int64_t Scale, unsigned AddrSpace) { in getScalingFactorCost()
/NextBSD/contrib/llvm/lib/Target/Mips/
HDMipsConstantIslandPass.cpp140 unsigned Bits, Scale; in branchMaxOffsets() local
683 unsigned Scale = 1; in initializeFunctionInfo() local
765 unsigned Scale = 1; in initializeFunctionInfo() local
/NextBSD/contrib/llvm/lib/Target/X86/AsmParser/
HDX86AsmParser.cpp264 unsigned BaseReg, IndexReg, TmpReg, Scale; member in __anon60f6c09b0111::X86AsmParser::IntelExprStateMachine
1057 unsigned Scale, SMLoc Start, SMLoc End, unsigned Size, StringRef Identifier, in CreateMemForInlineAsm()
1333 int Scale = SM.getScale(); in ParseIntelBracExpression() local
1938 unsigned BaseReg = 0, IndexReg = 0, Scale = 1; in ParseMemOperand() local
/NextBSD/contrib/llvm/lib/Transforms/Scalar/
HDLoopStrengthReduce.cpp236 int64_t Scale; member
1365 bool HasBaseReg, int64_t Scale) { in isAMCompletelyFolded()
1417 bool HasBaseReg, int64_t Scale) { in isAMCompletelyFolded()
1454 int64_t Scale) { in isLegalUse()
1526 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1; in isAlwaysFoldable() local
1559 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1; in isAlwaysFoldable() local
2156 int64_t Scale = C->getSExtValue(); in OptimizeLoopTermCond() local
HDNaryReassociate.cpp299 int64_t Scale = 0; in isGEPFoldable() local
HDStraightLineStrengthReduce.cpp243 int64_t Scale = 0; in isGEPFoldable() local
/NextBSD/contrib/llvm/include/llvm/ADT/
HDBitVector.h547 const unsigned Scale = BITWORD_SIZE / 32; in applyMask() local
/NextBSD/contrib/llvm/lib/Target/AArch64/InstPrinter/
HDAArch64InstPrinter.cpp1088 unsigned Scale, raw_ostream &O) { in printUImm12Offset()
1099 unsigned Scale, raw_ostream &O) { in printAMIndexedWB()
/NextBSD/contrib/llvm/lib/Transforms/InstCombine/
HDInstructionCombining.cpp970 Value *InstCombiner::Descale(Value *Val, APInt Scale, bool &NoSignedWrap) { in Descale()
1689 uint64_t Scale = SrcSize / ResSize; in visitGetElementPtrInst() local
1728 uint64_t Scale = ArrayEltSize / ResSize; in visitGetElementPtrInst() local
HDInstCombineCasts.cpp28 static Value *DecomposeSimpleLinearExpr(Value *Val, unsigned &Scale, in DecomposeSimpleLinearExpr()
124 unsigned Scale = (AllocElTySize*ArraySizeScale)/CastElTySize; in PromoteCastOfAllocation() local
/NextBSD/contrib/llvm/include/llvm/MC/
HDMCRegisterInfo.h543 unsigned Scale = RU & 15; in MCRegUnitIterator() local

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