Searched defs:SuperRC (Results 1 – 14 of 14) sorted by relevance
| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | SILoadStoreOptimizer.cpp | 1183 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeRead2Pair() local
1322 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeImagePair() local
1371 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeSMemLoadImmPair() local
1421 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeBufferLoadPair() local
1476 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeTBufferLoadPair() local
1540 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeTBufferStorePair() local
1590 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeFlatLoadPair() local
1638 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeFlatStorePair() local
1864 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeBufferStorePair() local
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| D | SIInstrInfo.cpp | 4997 const TargetRegisterClass *SuperRC, in buildExtractSubReg()
5030 const TargetRegisterClass *SuperRC, in buildExtractSubRegOrImm()
5071 const TargetRegisterClass *SuperRC = RI.getLargestLegalSuperClass(RC, *MF); in isLegalRegOperand() local
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| D | SIRegisterInfo.cpp | 2816 SIRegisterInfo::getCompatibleSubRegClass(const TargetRegisterClass *SuperRC, in getCompatibleSubRegClass()
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| D | AMDGPUISelDAGToDAG.cpp | 379 const TargetRegisterClass *SuperRC = in getOperandRegClass() local
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| D | AMDGPUInstructionSelector.cpp | 2898 const TargetRegisterClass *SuperRC, Register IdxReg, in computeIndirectRegIndex()
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| D | SIISelLowering.cpp | 3761 const TargetRegisterClass *SuperRC, in computeIndirectRegAndOffset()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.cpp | 439 if (const TargetRegisterClass *SuperRC = *RC.getSuperClasses()) in getHexagonSubRegIndex() local
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| D | HexagonCopyToCombine.cpp | 583 const TargetRegisterClass *SuperRC = nullptr; in combine() local
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 615 const TargetRegisterClass *SuperRC = in FindSuitableFreeRegisters() local
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| D | RegAllocGreedy.cpp | 1247 const MachineInstr *MI, Register Reg, const TargetRegisterClass *SuperRC, in getNumAllocatableRegsForConstraints()
1341 const TargetRegisterClass *SuperRC = in tryInstructionSplit() local
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| D | TargetLoweringBase.cpp | 1275 const TargetRegisterClass *SuperRC = TRI->getRegClass(i); in findRepresentativeClass() local
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| D | MachineVerifier.cpp | 2229 const TargetRegisterClass *SuperRC = in visitMachineOperand() local
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| /openbsd/src/gnu/llvm/llvm/utils/TableGen/ |
| D | CodeGenRegisters.h | 411 CodeGenRegisterClass *SuperRC) { in addSuperRegClass()
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| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 644 getSubRegisterClass(const TargetRegisterClass *SuperRC, in getSubRegisterClass()
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