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Searched defs:Tmp1 (Results 1 – 25 of 29) sorted by relevance

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/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DIntrinsicLowering.cpp63 Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
77 Value *Tmp1 = Builder.CreateLShr(V,ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
107 Value* Tmp1 = Builder.CreateLShr(V, in LowerBSWAP() local
/openbsd/src/gnu/llvm/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp122 Value *Tmp1 = Builder.CreateAShr(Divisor, Shift); in generateSignedDivisionCode() local
235 Value *Tmp1 = Builder.CreateCall(CTLZ, {Dividend, True}); in generateUnsignedDivisionCode() local
/openbsd/src/gnu/llvm/llvm/lib/Target/VE/
DVEISelLowering.cpp2033 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareMBB() local
2097 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2115 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2140 Register Tmp1 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2526 Register Tmp1 = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2571 Register Tmp1 = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2597 Register Tmp1 = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp3886 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchBEXTRFromAndImm() local
3922 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPISTR() local
3955 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPESTR() local
4248 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchVPTERNLOG() local
4634 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in tryVPTESTM() local
5134 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5187 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5269 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5403 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5411 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain; in Select() local
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp2119 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts() local
2179 SDValue Tmp1 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts() local
2342 SDValue Tmp1 = Node->getOperand(0); in LowerVAARG() local
2600 SDValue Tmp1 = ST->getChain(); in LowerSTOREi1() local
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp365 SDValue Tmp1 = Vec; in PerformInsertVectorEltInMemory() local
1699 SDValue Tmp1 = SDValue(Node, 0); in ExpandDYNAMIC_STACKALLOC() local
2467 SDValue Tmp1; in ExpandLegalINT_TO_FP() local
2692 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in ExpandNode() local
4501 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in PromoteNode() local
DTargetLowering.cpp7678 SDValue Tmp1 = IsSRA ? DAG.getNode(ISD::SRA, dl, VT, ShOpHi, in expandShiftParts() local
8327 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5; in expandVPCTPOP() local
8618 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in expandBSWAP() local
8678 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in expandVPBSWAP() local
DLegalizeFloatTypes.cpp1847 SDValue Tmp1, Tmp2, Tmp3, OutputChain; in FloatExpandSetCCOperands() local
DSelectionDAG.cpp2272 SDValue Tmp1 = Node->getOperand(0); in expandVAArg() local
2308 SDValue Tmp1 = in expandVACopy() local
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DAMDGPUPromoteAlloca.cpp1020 Value *Tmp1 = Builder.CreateMul(TIdY, TCntZ, "", true, true); in handleAlloca() local
DAMDGPULegalizerInfo.cpp2055 auto Tmp1 = B.buildFAdd(Ty, Src, CopySign); in legalizeFrint() local
2169 auto Tmp1 = B.buildSelect(S64, ExpLt0, SignBit64, Tmp0); in legalizeIntrinsicTrunc() local
3802 auto Tmp1 = B.buildFMA(ResTy, NegY, R, One); in legalizeFastUnsafeFDIV64() local
DAMDGPUISelLowering.cpp2226 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0); in LowerFTRUNC() local
2244 SDValue Tmp1 = DAG.getNode(ISD::FADD, SL, MVT::f64, Src, CopySign); in LowerFRINT() local
DSIISelLowering.cpp3400 SDValue Tmp1 = Op; in lowerDYNAMIC_STACKALLOCImpl() local
8947 SDValue Tmp1 = DAG.getNode(ISD::FMA, SL, VT, NegY, R, One); in lowerFastUnsafeFDIV64() local
10524 SDValue Tmp1 = DAG.getNode(ExtOp, SL, NVT, Op0->getOperand(0)); in performIntMed3ImmCombine() local
/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonSplitDouble.cpp688 auto *Tmp1 = MF.getMachineMemOperand(Ptr, F, 4 /*size*/, A); in splitMemRef() local
DHexagonHardwareLoops.cpp1863 SmallVector<MachineOperand,2> Tmp1; in createPreheaderForLoop() local
DHexagonVectorCombine.cpp584 Value *Tmp1 = Builder.CreateGEP(Type::getInt8Ty(HVC.F.getContext()), Tmp0, in createAdjustedPointer() local
DHexagonISelLoweringHVX.cpp2464 SDValue Tmp1 = DAG.getNode(ShRight, dl, IntTy, Inp, AmtM1); in emitHvxShiftRightRnd() local
/openbsd/src/gnu/llvm/clang/lib/CodeGen/
DCGExprComplex.cpp913 llvm::Value *Tmp1 = Builder.CreateMul(LHSr, RHSr); // a*c in EmitBinDiv() local
/openbsd/src/gnu/llvm/clang/lib/StaticAnalyzer/Core/
DCheckerManager.cpp123 ExplodedNodeSet Tmp1, Tmp2; in expandGraphWithCheckers() local
/openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp6066 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
6080 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
DPPCISelLowering.cpp8847 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSHL_PARTS() local
8876 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRL_PARTS() local
8904 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRA_PARTS() local
/openbsd/src/gnu/llvm/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp478 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; in LowerFPToInt() local
/openbsd/src/gnu/llvm/llvm/lib/Support/
DAPInt.cpp714 uint64_t Tmp1 = ByteSwap_64(U.VAL); in byteSwap() local
/openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp3152 SDValue Tmp1 = DAG.getNode(ISD::SRA, dl, VT, BottomHalf, ShiftAmt); in LowerUMULO_SMULO() local
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/
DARMISelLowering.cpp6010 SDValue Tmp1 = Op.getOperand(1); in LowerFCOPYSIGN() local
6311 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts() local
6353 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts() local

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