1 /* $NetBSD: virtio_pcireg.h,v 1.1 2021/01/20 19:46:48 reinoud Exp $ */ 2 3 /* 4 * Copyright (c) 2020 The NetBSD Foundation, Inc. 5 * Copyright (c) 2010 Minoura Makoto. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * Part of the file derived from `Virtio PCI Card Specification v0.8.6 DRAFT' 31 * Appendix A. 32 */ 33 /* An interface for efficient virtio implementation. 34 * 35 * This header is BSD licensed so anyone can use the definitions 36 * to implement compatible drivers/servers. 37 * 38 * Copyright 2007, 2009, IBM Corporation 39 * All rights reserved. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. Neither the name of IBM nor the names of its contributors 50 * may be used to endorse or promote products derived from this software 51 * without specific prior written permission. 52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 */ 64 65 66 #ifndef _DEV_PCI_VIRTIO_PCIREG_H_ 67 #define _DEV_PCI_VIRTIO_PCIREG_H_ 68 69 #include <sys/types.h> 70 71 /* 72 * Virtio PCI v0.9 config space 73 */ 74 #define VIRTIO_CONFIG_DEVICE_FEATURES 0 /* 32 bit */ 75 #define VIRTIO_CONFIG_GUEST_FEATURES 4 /* 32 bit */ 76 #define VIRTIO_CONFIG_QUEUE_ADDRESS 8 /* 32 bit */ 77 #define VIRTIO_CONFIG_QUEUE_SIZE 12 /* 16 bit */ 78 #define VIRTIO_CONFIG_QUEUE_SELECT 14 /* 16 bit */ 79 #define VIRTIO_CONFIG_QUEUE_NOTIFY 16 /* 16 bit */ 80 #define VIRTIO_CONFIG_DEVICE_STATUS 18 /* 8 bit */ 81 #define VIRTIO_CONFIG_ISR_STATUS 19 /* 8 bit */ 82 #define VIRTIO_CONFIG_CONFIG_VECTOR 20 /* 16 bit, optional */ 83 #define VIRTIO_CONFIG_DEVICE_CONFIG_NOMSI 20 /* start of config space */ 84 #define VIRTIO_CONFIG_DEVICE_CONFIG_MSI 24 /* start of config space */ 85 /* MSI/MSI-X */ 86 #define VIRTIO_CONFIG_MSI_CONFIG_VECTOR 20 /* 16 bit, optional */ 87 #define VIRTIO_CONFIG_MSI_QUEUE_VECTOR 22 /* 16 bit, optional */ 88 89 90 /* 91 * Virtio PCI 1.0 PCI cap space 92 */ 93 94 #define VIRTIO_PCI_CAP_COMMON_CFG 1 /* Common configuration */ 95 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2 /* Notifications */ 96 #define VIRTIO_PCI_CAP_ISR_CFG 3 /* ISR Status */ 97 #define VIRTIO_PCI_CAP_DEVICE_CFG 4 /* Device specific configuration */ 98 #define VIRTIO_PCI_CAP_PCI_CFG 5 /* PCI configuration access */ 99 100 struct virtio_pci_cap { 101 uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */ 102 uint8_t cap_next; /* Generic PCI field: next ptr */ 103 uint8_t cap_len; /* Generic PCI field: capability length */ 104 uint8_t cfg_type; /* Identifies the structure */ 105 uint8_t bar; /* Where to find it */ 106 uint8_t padding[3]; /* Pad to full dword */ 107 uint32_t offset; /* Offset within bar */ 108 uint32_t length; /* Length of the structure, in bytes */ 109 } __packed; 110 111 112 struct virtio_pci_notify_cap { 113 struct virtio_pci_cap cap; 114 uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */ 115 } __packed; 116 117 /* 118 * Virtio PCI v1.0 config space 119 */ 120 121 #define VIRTIO_CONFIG1_DEVICE_FEATURE_SELECT 0 /* 32 bit RW */ 122 #define VIRTIO_CONFIG1_DEVICE_FEATURE 4 /* 32 bit RO */ 123 #define VIRTIO_CONFIG1_DRIVER_FEATURE_SELECT 8 /* 32 bit RW */ 124 #define VIRTIO_CONFIG1_DRIVER_FEATURE 12 /* 32 bit RW */ 125 #define VIRTIO_CONFIG1_CONFIG_MSIX_VECTOR 16 /* 16 bit RW */ 126 #define VIRTIO_CONFIG1_NUM_QUEUES 18 /* 16 bit RO */ 127 #define VIRTIO_CONFIG1_DEVICE_STATUS 20 /* 8 bit RW */ 128 #define VIRTIO_CONFIG1_CONFIG_GENERATION 21 /* 8 bit RO */ 129 130 /* about a specific virtqueue: */ 131 #define VIRTIO_CONFIG1_QUEUE_SELECT 22 /* 16 bit RW */ 132 #define VIRTIO_CONFIG1_QUEUE_SIZE 24 /* 16 bit RO, power of 2 */ 133 #define VIRTIO_CONFIG1_QUEUE_MSIX_VECTOR 26 /* 16 bit RW */ 134 #define VIRTIO_CONFIG1_QUEUE_ENABLE 28 /* 16 bit RW */ 135 #define VIRTIO_CONFIG1_QUEUE_NOTIFY_OFF 30 /* 16 bit RO */ 136 #define VIRTIO_CONFIG1_QUEUE_DESC 32 /* 64 bit RW */ 137 #define VIRTIO_CONFIG1_QUEUE_AVAIL 40 /* 64 bit RW */ 138 #define VIRTIO_CONFIG1_QUEUE_USED 48 /* 64 bit RW */ 139 140 141 #endif /* _DEV_PCI_VIRTIO_PCIREG_H_ */ 142