1 /*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "dm_services.h"
27
28 #include "atom.h"
29
30 #include "include/bios_parser_types.h"
31
32 #include "command_table_helper.h"
33
dal_bios_parser_init_cmd_tbl_helper(const struct command_table_helper ** h,enum dce_version dce)34 bool dal_bios_parser_init_cmd_tbl_helper(
35 const struct command_table_helper **h,
36 enum dce_version dce)
37 {
38 switch (dce) {
39 case DCE_VERSION_8_0:
40 case DCE_VERSION_8_1:
41 case DCE_VERSION_8_3:
42 *h = dal_cmd_tbl_helper_dce80_get_table();
43 return true;
44
45 case DCE_VERSION_10_0:
46 *h = dal_cmd_tbl_helper_dce110_get_table();
47 return true;
48
49 case DCE_VERSION_11_0:
50 *h = dal_cmd_tbl_helper_dce110_get_table();
51 return true;
52
53 case DCE_VERSION_11_2:
54 case DCE_VERSION_11_22:
55 *h = dal_cmd_tbl_helper_dce112_get_table();
56 return true;
57
58 default:
59 /* Unsupported DCE */
60 BREAK_TO_DEBUGGER();
61 return false;
62 }
63 }
64
65 /* real implementations */
66
dal_cmd_table_helper_controller_id_to_atom(enum controller_id id,uint8_t * atom_id)67 bool dal_cmd_table_helper_controller_id_to_atom(
68 enum controller_id id,
69 uint8_t *atom_id)
70 {
71 if (atom_id == NULL) {
72 BREAK_TO_DEBUGGER();
73 return false;
74 }
75
76 switch (id) {
77 case CONTROLLER_ID_D0:
78 *atom_id = ATOM_CRTC1;
79 return true;
80 case CONTROLLER_ID_D1:
81 *atom_id = ATOM_CRTC2;
82 return true;
83 case CONTROLLER_ID_D2:
84 *atom_id = ATOM_CRTC3;
85 return true;
86 case CONTROLLER_ID_D3:
87 *atom_id = ATOM_CRTC4;
88 return true;
89 case CONTROLLER_ID_D4:
90 *atom_id = ATOM_CRTC5;
91 return true;
92 case CONTROLLER_ID_D5:
93 *atom_id = ATOM_CRTC6;
94 return true;
95 case CONTROLLER_ID_UNDERLAY0:
96 *atom_id = ATOM_UNDERLAY_PIPE0;
97 return true;
98 case CONTROLLER_ID_UNDEFINED:
99 *atom_id = ATOM_CRTC_INVALID;
100 return true;
101 default:
102 /* Wrong controller id */
103 BREAK_TO_DEBUGGER();
104 return false;
105 }
106 }
107
108 /**
109 * translate_transmitter_bp_to_atom
110 *
111 * @brief
112 * Translate the Transmitter to the corresponding ATOM BIOS value
113 *
114 * @param
115 * input transmitter
116 * output digitalTransmitter
117 * // =00: Digital Transmitter1 ( UNIPHY linkAB )
118 * // =01: Digital Transmitter2 ( UNIPHY linkCD )
119 * // =02: Digital Transmitter3 ( UNIPHY linkEF )
120 */
dal_cmd_table_helper_transmitter_bp_to_atom(enum transmitter t)121 uint8_t dal_cmd_table_helper_transmitter_bp_to_atom(
122 enum transmitter t)
123 {
124 switch (t) {
125 case TRANSMITTER_UNIPHY_A:
126 case TRANSMITTER_UNIPHY_B:
127 case TRANSMITTER_TRAVIS_LCD:
128 return 0;
129 case TRANSMITTER_UNIPHY_C:
130 case TRANSMITTER_UNIPHY_D:
131 return 1;
132 case TRANSMITTER_UNIPHY_E:
133 case TRANSMITTER_UNIPHY_F:
134 return 2;
135 default:
136 /* Invalid Transmitter Type! */
137 BREAK_TO_DEBUGGER();
138 return 0;
139 }
140 }
141
dal_cmd_table_helper_encoder_mode_bp_to_atom(enum signal_type s,bool enable_dp_audio)142 uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom(
143 enum signal_type s,
144 bool enable_dp_audio)
145 {
146 switch (s) {
147 case SIGNAL_TYPE_DVI_SINGLE_LINK:
148 case SIGNAL_TYPE_DVI_DUAL_LINK:
149 return ATOM_ENCODER_MODE_DVI;
150 case SIGNAL_TYPE_HDMI_TYPE_A:
151 return ATOM_ENCODER_MODE_HDMI;
152 case SIGNAL_TYPE_LVDS:
153 return ATOM_ENCODER_MODE_LVDS;
154 case SIGNAL_TYPE_EDP:
155 case SIGNAL_TYPE_DISPLAY_PORT_MST:
156 case SIGNAL_TYPE_DISPLAY_PORT:
157 case SIGNAL_TYPE_VIRTUAL:
158 if (enable_dp_audio)
159 return ATOM_ENCODER_MODE_DP_AUDIO;
160 else
161 return ATOM_ENCODER_MODE_DP;
162 case SIGNAL_TYPE_RGB:
163 return ATOM_ENCODER_MODE_CRT;
164 default:
165 return ATOM_ENCODER_MODE_CRT;
166 }
167 }
168
dal_cmd_table_helper_assign_control_parameter(const struct command_table_helper * h,struct bp_encoder_control * control,DIG_ENCODER_CONTROL_PARAMETERS_V2 * ctrl_param)169 void dal_cmd_table_helper_assign_control_parameter(
170 const struct command_table_helper *h,
171 struct bp_encoder_control *control,
172 DIG_ENCODER_CONTROL_PARAMETERS_V2 *ctrl_param)
173 {
174 /* there are three transmitter blocks, each one has two links 4-lanes
175 * each, A+B, C+D, E+F, Uniphy A, C and E are enumerated as link 0 in
176 * each transmitter block B, D and F as link 1, third transmitter block
177 * has non splitable links (UniphyE and UniphyF can not be configured
178 * separately to drive two different streams)
179 */
180 if ((control->transmitter == TRANSMITTER_UNIPHY_B) ||
181 (control->transmitter == TRANSMITTER_UNIPHY_D) ||
182 (control->transmitter == TRANSMITTER_UNIPHY_F)) {
183 /* Bit2: Link Select
184 * =0: PHY linkA/C/E
185 * =1: PHY linkB/D/F
186 */
187 ctrl_param->acConfig.ucLinkSel = 1;
188 }
189
190 /* Bit[4:3]: Transmitter Selection
191 * =00: Digital Transmitter1 ( UNIPHY linkAB )
192 * =01: Digital Transmitter2 ( UNIPHY linkCD )
193 * =02: Digital Transmitter3 ( UNIPHY linkEF )
194 * =03: Reserved
195 */
196 ctrl_param->acConfig.ucTransmitterSel =
197 (uint8_t)(h->transmitter_bp_to_atom(control->transmitter));
198
199 /* We need to convert from KHz units into 10KHz units */
200 ctrl_param->ucAction = h->encoder_action_to_atom(control->action);
201 ctrl_param->usPixelClock = cpu_to_le16((uint16_t)(control->pixel_clock / 10));
202 ctrl_param->ucEncoderMode =
203 (uint8_t)(h->encoder_mode_bp_to_atom(
204 control->signal, control->enable_dp_audio));
205 ctrl_param->ucLaneNum = (uint8_t)(control->lanes_number);
206 }
207
dal_cmd_table_helper_clock_source_id_to_ref_clk_src(enum clock_source_id id,uint32_t * ref_clk_src_id)208 bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src(
209 enum clock_source_id id,
210 uint32_t *ref_clk_src_id)
211 {
212 if (ref_clk_src_id == NULL) {
213 BREAK_TO_DEBUGGER();
214 return false;
215 }
216
217 switch (id) {
218 case CLOCK_SOURCE_ID_PLL1:
219 *ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL;
220 return true;
221 case CLOCK_SOURCE_ID_PLL2:
222 *ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL;
223 return true;
224 case CLOCK_SOURCE_ID_DCPLL:
225 *ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL;
226 return true;
227 case CLOCK_SOURCE_ID_EXTERNAL:
228 *ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK;
229 return true;
230 case CLOCK_SOURCE_ID_UNDEFINED:
231 *ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID;
232 return true;
233 default:
234 /* Unsupported clock source id */
235 BREAK_TO_DEBUGGER();
236 return false;
237 }
238 }
239
dal_cmd_table_helper_encoder_id_to_atom(enum encoder_id id)240 uint8_t dal_cmd_table_helper_encoder_id_to_atom(
241 enum encoder_id id)
242 {
243 switch (id) {
244 case ENCODER_ID_INTERNAL_LVDS:
245 return ENCODER_OBJECT_ID_INTERNAL_LVDS;
246 case ENCODER_ID_INTERNAL_TMDS1:
247 return ENCODER_OBJECT_ID_INTERNAL_TMDS1;
248 case ENCODER_ID_INTERNAL_TMDS2:
249 return ENCODER_OBJECT_ID_INTERNAL_TMDS2;
250 case ENCODER_ID_INTERNAL_DAC1:
251 return ENCODER_OBJECT_ID_INTERNAL_DAC1;
252 case ENCODER_ID_INTERNAL_DAC2:
253 return ENCODER_OBJECT_ID_INTERNAL_DAC2;
254 case ENCODER_ID_INTERNAL_LVTM1:
255 return ENCODER_OBJECT_ID_INTERNAL_LVTM1;
256 case ENCODER_ID_INTERNAL_HDMI:
257 return ENCODER_OBJECT_ID_HDMI_INTERNAL;
258 case ENCODER_ID_EXTERNAL_TRAVIS:
259 return ENCODER_OBJECT_ID_TRAVIS;
260 case ENCODER_ID_EXTERNAL_NUTMEG:
261 return ENCODER_OBJECT_ID_NUTMEG;
262 case ENCODER_ID_INTERNAL_KLDSCP_TMDS1:
263 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1;
264 case ENCODER_ID_INTERNAL_KLDSCP_DAC1:
265 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1;
266 case ENCODER_ID_INTERNAL_KLDSCP_DAC2:
267 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2;
268 case ENCODER_ID_EXTERNAL_MVPU_FPGA:
269 return ENCODER_OBJECT_ID_MVPU_FPGA;
270 case ENCODER_ID_INTERNAL_DDI:
271 return ENCODER_OBJECT_ID_INTERNAL_DDI;
272 case ENCODER_ID_INTERNAL_UNIPHY:
273 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY;
274 case ENCODER_ID_INTERNAL_KLDSCP_LVTMA:
275 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA;
276 case ENCODER_ID_INTERNAL_UNIPHY1:
277 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1;
278 case ENCODER_ID_INTERNAL_UNIPHY2:
279 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2;
280 case ENCODER_ID_INTERNAL_UNIPHY3:
281 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3;
282 case ENCODER_ID_INTERNAL_WIRELESS:
283 return ENCODER_OBJECT_ID_INTERNAL_VCE;
284 case ENCODER_ID_UNKNOWN:
285 return ENCODER_OBJECT_ID_NONE;
286 default:
287 /* Invalid encoder id */
288 BREAK_TO_DEBUGGER();
289 return ENCODER_OBJECT_ID_NONE;
290 }
291 }
292