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Searched defs:getReg (Results 1 – 25 of 26) sorted by relevance

12

/NextBSD/contrib/llvm/include/llvm/MC/
HDMachineLocation.h54 unsigned getReg() const { return Register; } in getReg() function
HDMCInst.h63 unsigned getReg() const { in getReg() function
/NextBSD/contrib/llvm/include/llvm/CodeGen/
HDLiveRangeEdit.h135 unsigned getReg() const { return getParent().reg; } in getReg() function
HDScheduleDAG.h235 unsigned getReg() const { in getReg() function
HDCallingConvLower.h77 static CCValAssign getReg(unsigned ValNo, MVT ValVT, in getReg() function
HDMachineOperand.h267 unsigned getReg() const { in getReg() function
HDMachineFrameInfo.h46 unsigned getReg() const { return Reg; } in getReg() function
/NextBSD/contrib/llvm/lib/Target/Mips/
HDMipsOptimizePICCall.cpp287 unsigned OptimizePICCall::getReg(ValueType Entry) { in getReg() function in OptimizePICCall
HDMipsFastISel.cpp55 unsigned getReg() const { in getReg() function in __anon437306f10111::MipsFastISel::Address
/NextBSD/contrib/llvm/projects/libunwind/src/
HDUnwindCursor.hpp380 virtual unw_word_t getReg(int) { _LIBUNWIND_ABORT("getReg not implemented"); } in getReg() function in libunwind::AbstractUnwindCursor
600 unw_word_t UnwindCursor<A, R>::getReg(int regNum) { in getReg() function in libunwind::UnwindCursor
/NextBSD/contrib/llvm/utils/TableGen/
HDFastISelEmitter.cpp88 static OpKind getReg() { OpKind K; K.Repr = OK_Reg; return K; } in getReg() function in __anonfaa1fabf0311::OperandsSignature::OpKind
HDCodeGenRegisters.cpp174 const CodeGenRegister *getReg() const { assert(isValid()); return *RegI; } in getReg() function in __anonff09ebd70111::RegUnitIterator
1028 CodeGenRegister *CodeGenRegBank::getReg(Record *Def) { in getReg() function in CodeGenRegBank
HDDAGISelMatcher.h887 const CodeGenRegister *getReg() const { return Reg; } in getReg() function
/NextBSD/contrib/llvm/lib/Target/Sparc/AsmParser/
HDSparcAsmParser.cpp218 unsigned getReg() const override { in getReg() function in __anoncd81a7410111::SparcOperand
/NextBSD/contrib/llvm/lib/Target/X86/AsmParser/
HDX86Operand.h97 unsigned getReg() const override { in getReg() function
/NextBSD/contrib/llvm/lib/CodeGen/
HDPeepholeOptimizer.cpp294 unsigned getReg() const { return Reg; } in getReg() function in __anonc2f739380111::ValueTracker
/NextBSD/contrib/llvm/lib/Target/XCore/Disassembler/
HDXCoreDisassembler.cpp70 static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { in getReg() function
/NextBSD/contrib/llvm/lib/Target/AMDGPU/AsmParser/
HDAMDGPUAsmParser.cpp193 unsigned getReg() const override { in getReg() function in __anon0f45d00b0111::AMDGPUOperand
/NextBSD/contrib/llvm/lib/Target/SystemZ/AsmParser/
HDSystemZAsmParser.cpp202 unsigned getReg() const override { in getReg() function in __anoncc88d8cd0111::SystemZOperand
/NextBSD/contrib/llvm/lib/Target/PowerPC/AsmParser/
HDPPCAsmParser.cpp421 unsigned getReg() const override { in getReg() function
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonHardwareLoops.cpp315 unsigned getReg() const { in getReg() function in __anon559e4b930111::CountValue
/NextBSD/contrib/llvm/lib/Target/Mips/AsmParser/
HDMipsAsmParser.cpp1009 unsigned getReg() const override { in getReg() function in __anon2b3557210311::MipsOperand
2970 unsigned MipsAsmParser::getReg(int RC, int RegNo) { in getReg() function in MipsAsmParser
/NextBSD/contrib/llvm/lib/Target/Mips/Disassembler/
HDMipsDisassembler.cpp459 static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { in getReg() function
/NextBSD/contrib/llvm/lib/Target/AArch64/AsmParser/
HDAArch64AsmParser.cpp361 unsigned getReg() const override { in getReg() function in __anon61806b610211::AArch64Operand
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64FastISel.cpp78 unsigned getReg() const { in getReg() function in __anon7813cc510111::AArch64FastISel::Address

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