1 //==-- llvm/MC/MCSubtargetInfo.h - Subtarget Information ---------*- C++ -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file describes the subtarget options of a Target machine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_MC_MCSUBTARGETINFO_H 15 #define LLVM_MC_MCSUBTARGETINFO_H 16 17 #include "llvm/MC/MCInstrItineraries.h" 18 #include "llvm/MC/SubtargetFeature.h" 19 #include <string> 20 21 namespace llvm { 22 23 class StringRef; 24 25 //===----------------------------------------------------------------------===// 26 /// 27 /// MCSubtargetInfo - Generic base class for all target subtargets. 28 /// 29 class MCSubtargetInfo { 30 Triple TargetTriple; // Target triple 31 std::string CPU; // CPU being targeted. 32 ArrayRef<SubtargetFeatureKV> ProcFeatures; // Processor feature list 33 ArrayRef<SubtargetFeatureKV> ProcDesc; // Processor descriptions 34 35 // Scheduler machine model 36 const SubtargetInfoKV *ProcSchedModels; 37 const MCWriteProcResEntry *WriteProcResTable; 38 const MCWriteLatencyEntry *WriteLatencyTable; 39 const MCReadAdvanceEntry *ReadAdvanceTable; 40 const MCSchedModel *CPUSchedModel; 41 42 const InstrStage *Stages; // Instruction itinerary stages 43 const unsigned *OperandCycles; // Itinerary operand cycles 44 const unsigned *ForwardingPaths; // Forwarding paths 45 FeatureBitset FeatureBits; // Feature bits for current CPU + FS 46 47 MCSubtargetInfo() = delete; 48 MCSubtargetInfo &operator=(MCSubtargetInfo &&) = delete; 49 MCSubtargetInfo &operator=(const MCSubtargetInfo &) = delete; 50 51 public: 52 MCSubtargetInfo(const MCSubtargetInfo &) = default; 53 MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS, 54 ArrayRef<SubtargetFeatureKV> PF, 55 ArrayRef<SubtargetFeatureKV> PD, 56 const SubtargetInfoKV *ProcSched, 57 const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, 58 const MCReadAdvanceEntry *RA, const InstrStage *IS, 59 const unsigned *OC, const unsigned *FP); 60 61 /// getTargetTriple - Return the target triple string. getTargetTriple()62 const Triple &getTargetTriple() const { return TargetTriple; } 63 64 /// getCPU - Return the CPU string. getCPU()65 StringRef getCPU() const { 66 return CPU; 67 } 68 69 /// getFeatureBits - Return the feature bits. 70 /// getFeatureBits()71 const FeatureBitset& getFeatureBits() const { 72 return FeatureBits; 73 } 74 75 /// setFeatureBits - Set the feature bits. 76 /// setFeatureBits(const FeatureBitset & FeatureBits_)77 void setFeatureBits(const FeatureBitset &FeatureBits_) { 78 FeatureBits = FeatureBits_; 79 } 80 81 protected: 82 /// Initialize the scheduling model and feature bits. 83 /// 84 /// FIXME: Find a way to stick this in the constructor, since it should only 85 /// be called during initialization. 86 void InitMCProcessorInfo(StringRef CPU, StringRef FS); 87 88 public: 89 /// Set the features to the default for the given CPU. 90 void setDefaultFeatures(StringRef CPU); 91 92 /// ToggleFeature - Toggle a feature and returns the re-computed feature 93 /// bits. This version does not change the implied bits. 94 FeatureBitset ToggleFeature(uint64_t FB); 95 96 /// ToggleFeature - Toggle a feature and returns the re-computed feature 97 /// bits. This version does not change the implied bits. 98 FeatureBitset ToggleFeature(const FeatureBitset& FB); 99 100 /// ToggleFeature - Toggle a set of features and returns the re-computed 101 /// feature bits. This version will also change all implied bits. 102 FeatureBitset ToggleFeature(StringRef FS); 103 104 /// Apply a feature flag and return the re-computed feature bits, including 105 /// all feature bits implied by the flag. 106 FeatureBitset ApplyFeatureFlag(StringRef FS); 107 108 /// getSchedModelForCPU - Get the machine model of a CPU. 109 /// 110 const MCSchedModel &getSchedModelForCPU(StringRef CPU) const; 111 112 /// Get the machine model for this subtarget's CPU. getSchedModel()113 const MCSchedModel &getSchedModel() const { return *CPUSchedModel; } 114 115 /// Return an iterator at the first process resource consumed by the given 116 /// scheduling class. getWriteProcResBegin(const MCSchedClassDesc * SC)117 const MCWriteProcResEntry *getWriteProcResBegin( 118 const MCSchedClassDesc *SC) const { 119 return &WriteProcResTable[SC->WriteProcResIdx]; 120 } getWriteProcResEnd(const MCSchedClassDesc * SC)121 const MCWriteProcResEntry *getWriteProcResEnd( 122 const MCSchedClassDesc *SC) const { 123 return getWriteProcResBegin(SC) + SC->NumWriteProcResEntries; 124 } 125 getWriteLatencyEntry(const MCSchedClassDesc * SC,unsigned DefIdx)126 const MCWriteLatencyEntry *getWriteLatencyEntry(const MCSchedClassDesc *SC, 127 unsigned DefIdx) const { 128 assert(DefIdx < SC->NumWriteLatencyEntries && 129 "MachineModel does not specify a WriteResource for DefIdx"); 130 131 return &WriteLatencyTable[SC->WriteLatencyIdx + DefIdx]; 132 } 133 getReadAdvanceCycles(const MCSchedClassDesc * SC,unsigned UseIdx,unsigned WriteResID)134 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, 135 unsigned WriteResID) const { 136 // TODO: The number of read advance entries in a class can be significant 137 // (~50). Consider compressing the WriteID into a dense ID of those that are 138 // used by ReadAdvance and representing them as a bitset. 139 for (const MCReadAdvanceEntry *I = &ReadAdvanceTable[SC->ReadAdvanceIdx], 140 *E = I + SC->NumReadAdvanceEntries; I != E; ++I) { 141 if (I->UseIdx < UseIdx) 142 continue; 143 if (I->UseIdx > UseIdx) 144 break; 145 // Find the first WriteResIdx match, which has the highest cycle count. 146 if (!I->WriteResourceID || I->WriteResourceID == WriteResID) { 147 return I->Cycles; 148 } 149 } 150 return 0; 151 } 152 153 /// getInstrItineraryForCPU - Get scheduling itinerary of a CPU. 154 /// 155 InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const; 156 157 /// Initialize an InstrItineraryData instance. 158 void initInstrItins(InstrItineraryData &InstrItins) const; 159 160 /// Check whether the CPU string is valid. isCPUStringValid(StringRef CPU)161 bool isCPUStringValid(StringRef CPU) const { 162 auto Found = std::find_if(ProcDesc.begin(), ProcDesc.end(), 163 [=](const SubtargetFeatureKV &KV) { 164 return CPU == KV.Key; 165 }); 166 return Found != ProcDesc.end(); 167 } 168 }; 169 170 } // End llvm namespace 171 172 #endif 173