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Searched defs:mmCGTS_CU6_SP0_CTRL_REG (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h1515 #define mmCGTS_CU6_SP0_CTRL_REG 0xf026 macro
HDgfx_7_2_d.h1536 #define mmCGTS_CU6_SP0_CTRL_REG 0xf026 macro
HDgfx_8_0_d.h1729 #define mmCGTS_CU6_SP0_CTRL_REG 0xf026 macro
HDgfx_8_1_d.h1697 #define mmCGTS_CU6_SP0_CTRL_REG 0xf026 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h6311 #define mmCGTS_CU6_SP0_CTRL_REG … macro
HDgc_9_2_1_offset.h6602 #define mmCGTS_CU6_SP0_CTRL_REG … macro
HDgc_9_1_offset.h6590 #define mmCGTS_CU6_SP0_CTRL_REG … macro