| /openbsd/src/sys/dev/pci/drm/i915/display/ |
| D | intel_sprite_regs.h | 230 #define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \ argument
232 #define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \ argument
237 #define SPCNTR(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR) argument
266 #define SPLINOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF) argument
270 #define SPSTRIDE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASTRIDE, _SPBSTRIDE) argument
274 #define SPPOS(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAPOS, _SPBPOS) argument
282 #define SPSIZE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASIZE, _SPBSIZE) argument
290 #define SPKEYMINVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMINVAL, _SPBKEYMINVAL) argument
294 #define SPKEYMSK(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMSK, _SPBKEYMSK) argument
298 #define SPSURF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASURF, _SPBSURF) argument
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| D | skl_universal_plane.c | 248 enum plane_id plane_id) in icl_is_nv12_y_plane()
259 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id) in icl_is_hdr_plane()
602 enum plane_id plane_id = plane->id; in icl_program_input_csc() local
726 enum plane_id plane_id = plane->id; in skl_write_plane_wm() local
764 enum plane_id plane_id = plane->id; in skl_plane_disable_arm() local
790 enum plane_id plane_id = plane->id; in icl_plane_disable_arm() local
809 enum plane_id plane_id = plane->id; in skl_plane_get_hw_state() local
1240 enum plane_id plane_id = plane->id; in icl_plane_csc_load_black() local
1276 enum plane_id plane_id = plane->id; in skl_plane_update_noarm() local
1306 enum plane_id plane_id = plane->id; in skl_plane_update_arm() local
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| D | skl_watermark.c | 351 enum plane_id plane_id; in skl_crtc_can_enable_sagv() local
403 enum plane_id plane_id; in tgl_crtc_can_enable_sagv() local
794 const enum plane_id plane_id, in skl_ddb_get_hw_plane_state()
825 enum plane_id plane_id; in skl_pipe_ddb_get_hw_state() local
1383 enum plane_id plane_id; in skl_total_relative_data_rate() local
1401 enum plane_id plane_id, in skl_plane_wm_level()
1414 enum plane_id plane_id) in skl_plane_trans_wm()
1516 enum plane_id plane_id; in skl_crtc_allocate_plane_ddb() local
2158 enum plane_id plane_id = plane->id; in skl_build_plane_wm() local
2188 enum plane_id plane_id = plane->id; in icl_build_plane_wm() local
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| D | i9xx_wm.c | 835 static int g4x_plane_fifo_size(enum plane_id plane_id, int level) in g4x_plane_fifo_size()
934 int level, enum plane_id plane_id, u16 value) in g4x_raw_plane_wm_set()
977 enum plane_id plane_id = plane->id; in g4x_raw_plane_wm_compute() local
1046 enum plane_id plane_id, int level) in g4x_raw_plane_wm_is_valid()
1071 enum plane_id plane_id; in g4x_invalidate_wms() local
1115 enum plane_id plane_id; in _g4x_compute_pipe_wm() local
1208 enum plane_id plane_id; in g4x_compute_intermediate_wm() local
1460 enum plane_id plane_id; in vlv_compute_fifo() local
1537 enum plane_id plane_id; in vlv_invalidate_wms() local
1560 int level, enum plane_id plane_id, u16 value) in vlv_raw_plane_wm_set()
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| D | intel_dpt_common.c | 18 enum plane_id plane_id; in intel_dpt_configure() local
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| D | intel_sprite.c | 72 enum plane_id plane_id = plane->id; in chv_sprite_update_csc() local
145 enum plane_id plane_id = plane->id; in vlv_sprite_update_clrc() local
363 enum plane_id plane_id = plane->id; in vlv_sprite_update_gamma() local
387 enum plane_id plane_id = plane->id; in vlv_sprite_update_noarm() local
409 enum plane_id plane_id = plane->id; in vlv_sprite_update_arm() local
457 enum plane_id plane_id = plane->id; in vlv_sprite_disable_arm() local
470 enum plane_id plane_id = plane->id; in vlv_sprite_get_hw_state() local
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| D | intel_frontbuffer.h | 63 #define INTEL_FRONTBUFFER(pipe, plane_id) \ argument
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| D | intel_display_limits.h | 62 enum plane_id { enum
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| D | intel_bw.c | 778 enum plane_id plane_id; in intel_bw_crtc_data_rate() local
1168 enum plane_id plane_id, in skl_plane_calc_dbuf_bw()
1193 enum plane_id plane_id; in skl_crtc_calc_dbuf_bw() local
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| D | intel_atomic_plane.c | 697 intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id) in intel_crtc_get_plane()
768 enum plane_id plane_id = plane->id; in skl_next_plane_to_commit() local
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| D | intel_fbc_regs.h | 66 #define DPFC_CTL_PLANE_BINDING(plane_id) REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, (plane_id)) argument
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| D | intel_cursor.c | 617 enum plane_id plane_id = plane->id; in skl_write_cursor_wm() local
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| D | intel_display_debugfs.c | 688 enum plane_id plane_id; in i915_ddb_info() local
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| /openbsd/src/sys/dev/pci/drm/i915/gvt/ |
| D | dmabuf.c | 257 int plane_id) in vgpu_get_plane_info()
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| /openbsd/src/sys/dev/pci/drm/include/uapi/drm/ |
| D | drm_mode.h | 297 __u32 plane_id; member
334 __u32 plane_id; member
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| D | i915_drm.h | 1926 __u32 plane_id; member
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| /openbsd/src/sys/dev/pci/drm/i915/ |
| D | i915_reg.h | 1745 #define PIPE_MISC2_FLIP_INFO_PLANE_SEL(plane_id) REG_FIELD_PREP(PIPE_MISC2_FLIP_INFO_PLANE_SEL_MA… argument
2244 #define PS_BINDING_PLANE(plane_id) REG_FIELD_PREP(PS_BINDING_MASK, (plane_id) + 1) argument
2267 #define PS_BINDING_Y_PLANE(plane_id) REG_FIELD_PREP(PS_BINDING_Y_MASK, (plane_id) + 1) argument
2537 #define GEN9_PIPE_PLANE_FLIP_DONE(plane_id) \ argument
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| /openbsd/src/sys/dev/pci/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm.c | 4785 struct amdgpu_mode_info *mode_info, int plane_id, in initialize_plane()
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