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Searched defs:reg_addr (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/netif/ix/
HDixgbe_x550.c522 static s32 ixgbe_read_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_x550em()
529 static s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_x550em()
1134 s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_iosf_sb_reg_x550()
1180 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_iosf_sb_reg_x550()
1295 s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_iosf_sb_reg_x550a()
1325 s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_iosf_sb_reg_x550a()
4358 s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_x550a()
4386 s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_x550a()
HDixgbe_phy.c583 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg_mdi()
665 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_generic()
691 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_mdi()
765 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_generic()
HDixgbe_api.c528 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg()
547 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_write_phy_reg()
1238 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_iosf_sb_reg()
1254 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_iosf_sb_reg()
/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
HDar9300_attach.c2609 u_int32_t reg_addr[2] = { AR_STA_ID0 }; in ar9300_chip_test() local
HDar9300.h401 u_int32_t reg_addr; // register offset member
/dragonfly/sys/dev/drm/amd/amdgpu/
HDgmc_v9_0.c568 uint32_t reg_addr; in gmc_v9_0_ecc_available() local
HDgfx_v8_0.c5774 uint32_t reg_addr, uint32_t cmd) in gfx_v8_0_send_serdes_cmd()
/dragonfly/sys/dev/drm/i915/
HDi915_cmd_parser.c1164 const u32 reg_addr = cmd[offset] & desc->reg.mask; in check_cmd() local
/dragonfly/sys/dev/netif/ig_hal/
HDe1000_ich8lan.c2265 u16 word_addr, reg_data, reg_addr, phy_page = 0; in e1000_sw_lcd_config_ich8lan() local