xref: /dragonfly/sys/dev/video/bktr/bktr_reg.h (revision 20b08a9afb666038efdd560d9510336d9928c3bb)
1 /*-
2  * $FreeBSD: src/sys/dev/bktr/bktr_reg.h,v 1.50 2005/05/24 20:42:08 cognet Exp $
3  *
4  * Copyright (c) 1999 Roger Hardiman
5  * Copyright (c) 1998 Amancio Hasty
6  * Copyright (c) 1995 Mark Tinguely and Jim Lowe
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *        This product includes software developed by Mark Tinguely and Jim Lowe
20  * 4. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
31  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
32  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33  * POSSIBILITY OF SUCH DAMAGE.
34  *
35  */
36 
37 /*
38  * The kernel options for the driver now all begin with BKTR.
39  * Support the older kernel options on FreeBSD and OpenBSD.
40  *
41  */
42 #if defined(BROOKTREE_ALLOC_PAGES)
43 #define BKTR_ALLOC_PAGES BROOKTREE_ALLOC_PAGES
44 #endif
45 
46 #if defined(BROOKTREE_SYSTEM_DEFAULT)
47 #define BKTR_SYSTEM_DEFAULT BROOKTREE_SYSTEM_DEFAULT
48 #endif
49 
50 #if defined(OVERRIDE_CARD)
51 #define BKTR_OVERRIDE_CARD OVERRIDE_CARD
52 #endif
53 
54 #if defined(OVERRIDE_TUNER)
55 #define BKTR_OVERRIDE_TUNER OVERRIDE_TUNER
56 #endif
57 
58 #if defined(OVERRIDE_DBX)
59 #define BKTR_OVERRIDE_DBX OVERRIDE_DBX
60 #endif
61 
62 #if defined(OVERRIDE_MSP)
63 #define BKTR_OVERRIDE_MSP OVERRIDE_MSP
64 #endif
65 
66 #ifndef PCI_LATENCY_TIMER
67 #define   PCI_LATENCY_TIMER             0x0c      /* pci timer register */
68 #endif
69 
70 /*
71  * Definitions for the Brooktree 848/878 video capture to pci interface.
72  */
73 #define PCI_VENDOR_SHIFT                        0
74 #define PCI_VENDOR_MASK                         0xffff
75 #define PCI_VENDOR(id) \
76             (((id) >> PCI_VENDOR_SHIFT) & PCI_VENDOR_MASK)
77 
78 #define PCI_PRODUCT_SHIFT                       16
79 #define PCI_PRODUCT_MASK                        0xffff
80 #define PCI_PRODUCT(id) \
81             (((id) >> PCI_PRODUCT_SHIFT) & PCI_PRODUCT_MASK)
82 
83 #define BROOKTREE_848                   1
84 #define BROOKTREE_848A                  2
85 #define BROOKTREE_849A                  3
86 #define BROOKTREE_878                   4
87 #define BROOKTREE_879                   5
88 
89 typedef volatile u_int        bregister_t;
90 /*
91  * if other persuasion endian, then compiler will probably require that
92  * these next
93  * macros be reversed
94  */
95 #define   BTBYTE(what)        bregister_t  what:8; int :24
96 #define   BTWORD(what)        bregister_t  what:16; int: 16
97 #define BTLONG(what)          bregister_t  what:32
98 
99 struct bt848_registers {
100     BTBYTE (dstatus);                   /* 0, 1,2,3 */
101 #define BT848_DSTATUS_PRES              (1<<7)
102 #define BT848_DSTATUS_HLOC              (1<<6)
103 #define BT848_DSTATUS_FIELD             (1<<5)
104 #define BT848_DSTATUS_NUML              (1<<4)
105 #define BT848_DSTATUS_CSEL              (1<<3)
106 #define BT848_DSTATUS_PLOCK             (1<<2)
107 #define BT848_DSTATUS_LOF               (1<<1)
108 #define BT848_DSTATUS_COF               (1<<0)
109     BTBYTE (iform);           /* 4, 5,6,7 */
110 #define BT848_IFORM_MUXSEL              (0x3<<5)
111 # define BT848_IFORM_M_MUX1             (0x03<<5)
112 # define BT848_IFORM_M_MUX0             (0x02<<5)
113 # define BT848_IFORM_M_MUX2             (0x01<<5)
114 # define BT848_IFORM_M_MUX3             (0x0)
115 # define BT848_IFORM_M_RSVD             (0x00<<5)
116 #define BT848_IFORM_XTSEL               (0x3<<3)
117 # define BT848_IFORM_X_AUTO             (0x03<<3)
118 # define BT848_IFORM_X_XT1              (0x02<<3)
119 # define BT848_IFORM_X_XT0              (0x01<<3)
120 # define BT848_IFORM_X_RSVD             (0x00<<3)
121     BTBYTE (tdec);            /* 8, 9,a,b */
122     BTBYTE (e_crop);                    /* c, d,e,f */
123     BTBYTE (e_vdelay_lo);     /* 10, 11,12,13 */
124     BTBYTE (e_vactive_lo);    /* 14, 15,16,17 */
125     BTBYTE (e_delay_lo);      /* 18, 19,1a,1b */
126     BTBYTE (e_hactive_lo);    /* 1c, 1d,1e,1f */
127     BTBYTE (e_hscale_hi);     /* 20, 21,22,23 */
128     BTBYTE (e_hscale_lo);     /* 24, 25,26,27 */
129     BTBYTE (bright);                    /* 28, 29,2a,2b */
130     BTBYTE (e_control);                 /* 2c, 2d,2e,2f */
131 #define BT848_E_CONTROL_LNOTCH                    (1<<7)
132 #define BT848_E_CONTROL_COMP            (1<<6)
133 #define BT848_E_CONTROL_LDEC            (1<<5)
134 #define BT848_E_CONTROL_CBSENSE                   (1<<4)
135 #define BT848_E_CONTROL_RSVD            (1<<3)
136 #define BT848_E_CONTROL_CON_MSB                   (1<<2)
137 #define BT848_E_CONTROL_SAT_U_MSB       (1<<1)
138 #define BT848_E_CONTROL_SAT_V_MSB       (1<<0)
139     BTBYTE (contrast_lo);     /* 30, 31,32,33 */
140     BTBYTE (sat_u_lo);                  /* 34, 35,36,37 */
141     BTBYTE (sat_v_lo);                  /* 38, 39,3a,3b */
142     BTBYTE (hue);             /* 3c, 3d,3e,3f */
143     BTBYTE (e_scloop);                  /* 40, 41,42,43 */
144 #define BT848_E_SCLOOP_RSVD1            (1<<7)
145 #define BT848_E_SCLOOP_CAGC             (1<<6)
146 #define BT848_E_SCLOOP_CKILL            (1<<5)
147 #define BT848_E_SCLOOP_HFILT            (0x3<<3)
148 # define BT848_E_SCLOOP_HFILT_ICON      (0x3<<3)
149 # define BT848_E_SCLOOP_HFILT_QCIF      (0x2<<3)
150 # define BT848_E_SCLOOP_HFILT_CIF       (0x1<<3)
151 # define BT848_E_SCLOOP_HFILT_AUTO      (0x0<<3)
152 #define BT848_E_SCLOOP_RSVD0            (0x7<<0)
153     int             :32;                /* 44, 45,46,47 */
154     BTBYTE (oform);           /* 48, 49,4a,4b */
155     BTBYTE (e_vscale_hi);     /* 4c, 4d,4e,4f */
156     BTBYTE (e_vscale_lo);     /* 50, 51,52,53 */
157     BTBYTE (test);            /* 54, 55,56,57 */
158     int             :32;                /* 58, 59,5a,5b */
159     int             :32;                /* 5c, 5d,5e,5f */
160     BTLONG (adelay);                    /* 60, 61,62,63 */
161     BTBYTE (bdelay);                    /* 64, 65,66,67 */
162     BTBYTE (adc);             /* 68, 69,6a,6b */
163 #define BT848_ADC_RESERVED              (0x80)    /* required pattern */
164 #define BT848_ADC_SYNC_T                (1<<5)
165 #define BT848_ADC_AGC_EN                (1<<4)
166 #define BT848_ADC_CLK_SLEEP             (1<<3)
167 #define BT848_ADC_Y_SLEEP               (1<<2)
168 #define BT848_ADC_C_SLEEP               (1<<1)
169 #define BT848_ADC_CRUSH                           (1<<0)
170     BTBYTE (e_vtc);           /* 6c, 6d,6e,6f */
171     int             :32;                /* 70, 71,72,73 */
172     int   :32;                /* 74, 75,76,77 */
173     int             :32;                /* 78, 79,7a,7b */
174     BTLONG (sreset);                    /* 7c, 7d,7e,7f */
175     u_char          filler1[0x84-0x80];
176     BTBYTE (tgctrl);                    /* 84, 85,86,87 */
177 #define BT848_TGCTRL_TGCKI              (3<<3)
178 #define BT848_TGCTRL_TGCKI_XTAL                   (0<<3)
179 #define BT848_TGCTRL_TGCKI_PLL                    (1<<3)
180 #define BT848_TGCTRL_TGCKI_GPCLK        (2<<3)
181 #define BT848_TGCTRL_TGCKI_GPCLK_I      (3<<3)
182     u_char          filler[0x8c-0x88];
183     BTBYTE (o_crop);                    /* 8c, 8d,8e,8f */
184     BTBYTE (o_vdelay_lo);     /* 90, 91,92,93 */
185     BTBYTE (o_vactive_lo);    /* 94, 95,96,97 */
186     BTBYTE (o_delay_lo);      /* 98, 99,9a,9b */
187     BTBYTE (o_hactive_lo);    /* 9c, 9d,9e,9f */
188     BTBYTE (o_hscale_hi);     /* a0, a1,a2,a3 */
189     BTBYTE (o_hscale_lo);     /* a4, a5,a6,a7 */
190     int             :32;                /* a8, a9,aa,ab */
191     BTBYTE (o_control);                 /* ac, ad,ae,af */
192 #define BT848_O_CONTROL_LNOTCH                    (1<<7)
193 #define BT848_O_CONTROL_COMP            (1<<6)
194 #define BT848_O_CONTROL_LDEC            (1<<5)
195 #define BT848_O_CONTROL_CBSENSE                   (1<<4)
196 #define BT848_O_CONTROL_RSVD            (1<<3)
197 #define BT848_O_CONTROL_CON_MSB                   (1<<2)
198 #define BT848_O_CONTROL_SAT_U_MSB       (1<<1)
199 #define BT848_O_CONTROL_SAT_V_MSB       (1<<0)
200     u_char          fillter4[16];
201     BTBYTE (o_scloop);                  /* c0, c1,c2,c3 */
202 #define BT848_O_SCLOOP_RSVD1            (1<<7)
203 #define BT848_O_SCLOOP_CAGC             (1<<6)
204 #define BT848_O_SCLOOP_CKILL            (1<<5)
205 #define BT848_O_SCLOOP_HFILT            (0x3<<3)
206 #define BT848_O_SCLOOP_HFILT_ICON       (0x3<<3)
207 #define BT848_O_SCLOOP_HFILT_QCIF       (0x2<<3)
208 #define BT848_O_SCLOOP_HFILT_CIF        (0x1<<3)
209 #define BT848_O_SCLOOP_HFILT_AUTO       (0x0<<3)
210 #define BT848_O_SCLOOP_RSVD0            (0x7<<0)
211     int             :32;                /* c4, c5,c6,c7 */
212     int             :32;                /* c8, c9,ca,cb */
213     BTBYTE (o_vscale_hi);     /* cc, cd,ce,cf */
214     BTBYTE (o_vscale_lo);     /* d0, d1,d2,d3 */
215     BTBYTE (color_fmt);                 /* d4, d5,d6,d7 */
216     bregister_t color_ctl_swap                    :4; /* d8 */
217 #define BT848_COLOR_CTL_WSWAP_ODD       (1<<3)
218 #define BT848_COLOR_CTL_WSWAP_EVEN      (1<<2)
219 #define BT848_COLOR_CTL_BSWAP_ODD       (1<<1)
220 #define BT848_COLOR_CTL_BSWAP_EVEN      (1<<0)
221     bregister_t color_ctl_gamma                   :1;
222     bregister_t color_ctl_rgb_ded       :1;
223     bregister_t color_ctl_color_bars    :1;
224     bregister_t color_ctl_ext_frmrate   :1;
225 #define BT848_COLOR_CTL_GAMMA           (1<<4)
226 #define BT848_COLOR_CTL_RGB_DED                   (1<<5)
227 #define BT848_COLOR_CTL_COLOR_BARS      (1<<6)
228 #define BT848_COLOR_CTL_EXT_FRMRATE     (1<<7)
229     int             :24;                /* d9,da,db */
230     BTBYTE (cap_ctl);                   /* dc, dd,de,df */
231 #define BT848_CAP_CTL_DITH_FRAME        (1<<4)
232 #define BT848_CAP_CTL_VBI_ODD           (1<<3)
233 #define BT848_CAP_CTL_VBI_EVEN                    (1<<2)
234 #define BT848_CAP_CTL_ODD               (1<<1)
235 #define BT848_CAP_CTL_EVEN              (1<<0)
236     BTBYTE (vbi_pack_size);   /* e0, e1,e2,e3 */
237     BTBYTE (vbi_pack_del);    /* e4, e5,e6,e7 */
238     int             :32;                /* e8, e9,ea,eb */
239     BTBYTE (o_vtc);           /* ec, ed,ee,ef */
240     BTBYTE (pll_f_lo);                  /* f0, f1,f2,f3 */
241     BTBYTE (pll_f_hi);                  /* f4, f5,f6,f7 */
242     BTBYTE (pll_f_xci);                 /* f8, f9,fa,fb */
243 #define BT848_PLL_F_C                             (1<<6)
244 #define BT848_PLL_F_X                             (1<<7)
245     u_char          filler2[0x100-0xfc];
246     BTLONG (int_stat);                  /* 100, 101,102,103 */
247     BTLONG (int_mask);                  /* 104, 105,106,107 */
248 #define BT848_INT_RISCS                           (0xf<<28)
249 #define BT848_INT_RISC_EN               (1<<27)
250 #define BT848_INT_RACK                            (1<<25)
251 #define BT848_INT_FIELD                           (1<<24)
252 #define BT848_INT_MYSTERYBIT            (1<<23)
253 #define BT848_INT_SCERR                           (1<<19)
254 #define BT848_INT_OCERR                           (1<<18)
255 #define BT848_INT_PABORT                (1<<17)
256 #define BT848_INT_RIPERR                (1<<16)
257 #define BT848_INT_PPERR                           (1<<15)
258 #define BT848_INT_FDSR                            (1<<14)
259 #define BT848_INT_FTRGT                           (1<<13)
260 #define BT848_INT_FBUS                            (1<<12)
261 #define BT848_INT_RISCI                           (1<<11)
262 #define BT848_INT_GPINT                           (1<<9)
263 #define BT848_INT_I2CDONE               (1<<8)
264 #define BT848_INT_RSV1                            (1<<7)
265 #define BT848_INT_RSV0                            (1<<6)
266 #define BT848_INT_VPRES                           (1<<5)
267 #define BT848_INT_HLOCK                           (1<<4)
268 #define BT848_INT_OFLOW                           (1<<3)
269 #define BT848_INT_HSYNC                           (1<<2)
270 #define BT848_INT_VSYNC                           (1<<1)
271 #define BT848_INT_FMTCHG                (1<<0)
272     int             :32;                /* 108, 109,10a,10b */
273     BTWORD (gpio_dma_ctl);    /* 10c, 10d,10e,10f */
274 #define BT848_DMA_CTL_PL23TP4           (0<<6)    /* planar1 trigger 4 */
275 #define BT848_DMA_CTL_PL23TP8           (1<<6)    /* planar1 trigger 8 */
276 #define BT848_DMA_CTL_PL23TP16                    (2<<6)    /* planar1 trigger 16 */
277 #define BT848_DMA_CTL_PL23TP32                    (3<<6)    /* planar1 trigger 32 */
278 #define BT848_DMA_CTL_PL1TP4            (0<<4)    /* planar1 trigger 4 */
279 #define BT848_DMA_CTL_PL1TP8            (1<<4)    /* planar1 trigger 8 */
280 #define BT848_DMA_CTL_PL1TP16           (2<<4)    /* planar1 trigger 16 */
281 #define BT848_DMA_CTL_PL1TP32           (3<<4)    /* planar1 trigger 32 */
282 #define BT848_DMA_CTL_PKTP4             (0<<2)    /* packed trigger 4 */
283 #define BT848_DMA_CTL_PKTP8             (1<<2)    /* packed trigger 8 */
284 #define BT848_DMA_CTL_PKTP16            (2<<2)    /* packed trigger 16 */
285 #define BT848_DMA_CTL_PKTP32            (3<<2)    /* packed trigger 32 */
286 #define BT848_DMA_CTL_RISC_EN           (1<<1)
287 #define BT848_DMA_CTL_FIFO_EN           (1<<0)
288     BTLONG (i2c_data_ctl);    /* 110, 111,112,113 */
289 #define BT848_DATA_CTL_I2CDIV           (0xf<<4)
290 #define BT848_DATA_CTL_I2CSYNC                    (1<<3)
291 #define BT848_DATA_CTL_I2CW3B           (1<<2)
292 #define BT848_DATA_CTL_I2CSCL           (1<<1)
293 #define BT848_DATA_CTL_I2CSDA           (1<<0)
294     BTLONG (risc_strt_add);   /* 114, 115,116,117 */
295     BTLONG (gpio_out_en);     /* 118, 119,11a,11b */        /* really 24 bits */
296     BTLONG (gpio_reg_inp);    /* 11c, 11d,11e,11f */        /* really 24 bits */
297     BTLONG (risc_count);      /* 120, 121,122,123 */
298     u_char          filler3[0x200-0x124];
299     BTLONG (gpio_data);                 /* 200, 201,202,203 */        /* really 24 bits */
300 };
301 
302 
303 #define BKTR_DSTATUS                              0x000
304 #define BKTR_IFORM                      0x004
305 #define BKTR_TDEC                       0x008
306 #define BKTR_E_CROP                     0x00C
307 #define BKTR_O_CROP                     0x08C
308 #define BKTR_E_VDELAY_LO                0x010
309 #define BKTR_O_VDELAY_LO                0x090
310 #define BKTR_E_VACTIVE_LO               0x014
311 #define BKTR_O_VACTIVE_LO               0x094
312 #define BKTR_E_DELAY_LO                           0x018
313 #define BKTR_O_DELAY_LO                           0x098
314 #define BKTR_E_HACTIVE_LO               0x01C
315 #define BKTR_O_HACTIVE_LO               0x09C
316 #define BKTR_E_HSCALE_HI                0x020
317 #define BKTR_O_HSCALE_HI                0x0A0
318 #define BKTR_E_HSCALE_LO                0x024
319 #define BKTR_O_HSCALE_LO                0x0A4
320 #define BKTR_BRIGHT                     0x028
321 #define BKTR_E_CONTROL                            0x02C
322 #define BKTR_O_CONTROL                            0x0AC
323 #define BKTR_CONTRAST_LO                0x030
324 #define BKTR_SAT_U_LO                             0x034
325 #define BKTR_SAT_V_LO                             0x038
326 #define BKTR_HUE                        0x03C
327 #define BKTR_E_SCLOOP                             0x040
328 #define BKTR_O_SCLOOP                             0x0C0
329 #define BKTR_OFORM                      0x048
330 #define BKTR_E_VSCALE_HI                0x04C
331 #define BKTR_O_VSCALE_HI                0x0CC
332 #define BKTR_E_VSCALE_LO                0x050
333 #define BKTR_O_VSCALE_LO                0x0D0
334 #define BKTR_TEST                       0x054
335 #define BKTR_ADELAY                     0x060
336 #define BKTR_BDELAY                     0x064
337 #define BKTR_ADC                        0x068
338 #define BKTR_E_VTC                      0x06C
339 #define BKTR_O_VTC                      0x0EC
340 #define BKTR_SRESET                     0x07C
341 #define BKTR_COLOR_FMT                            0x0D4
342 #define BKTR_COLOR_CTL                            0x0D8
343 #define BKTR_CAP_CTL                              0x0DC
344 #define BKTR_VBI_PACK_SIZE              0x0E0
345 #define BKTR_VBI_PACK_DEL               0x0E4
346 #define BKTR_INT_STAT                             0x100
347 #define BKTR_INT_MASK                             0x104
348 #define BKTR_RISC_COUNT                           0x120
349 #define BKTR_RISC_STRT_ADD              0x114
350 #define BKTR_GPIO_DMA_CTL               0x10C
351 #define BKTR_GPIO_OUT_EN                0x118
352 #define BKTR_GPIO_REG_INP               0x11C
353 #define BKTR_GPIO_DATA                            0x200
354 #define BKTR_I2C_DATA_CTL               0x110
355 #define BKTR_TGCTRL                     0x084
356 #define BKTR_PLL_F_LO                             0x0F0
357 #define BKTR_PLL_F_HI                             0x0F4
358 #define BKTR_PLL_F_XCI                            0x0F8
359 
360 /*
361  * device support for onboard tv tuners
362  */
363 
364 /* description of the LOGICAL tuner */
365 struct TVTUNER {
366           int                 frequency;
367           u_char              chnlset;
368           u_char              channel;
369           u_char              band;
370           u_char              afc;
371           u_char              radio_mode;         /* current mode of the radio mode */
372 };
373 
374 /* description of the PHYSICAL tuner */
375 struct TUNER {
376           char*               name;
377           u_char              type;
378           u_char              pllControl[4];
379           u_char              bandLimits[ 2 ];
380           u_char              bandAddrs[ 4 ];        /* 3 first for the 3 TV
381                                                          ** bands. Last for radio
382                                                          ** band (0x00=NoRadio).
383                                                          */
384 
385 };
386 
387 /* description of the card */
388 #define EEPROMBLOCKSIZE                 32
389 struct CARDTYPE {
390           unsigned int                  card_id;  /* card id (from #define's) */
391           char*                         name;
392           const struct TUNER* tuner;              /* Tuner details */
393           u_char                        tuner_pllAddr;      /* Tuner i2c address */
394           u_char                        dbx;                /* Has DBX chip? */
395           u_char                        msp3400c; /* Has msp3400c chip? */
396           u_char                        dpl3518a; /* Has dpl3518a chip? */
397           u_char                        eepromAddr;
398           u_char                        eepromSize;         /* bytes / EEPROMBLOCKSIZE */
399           u_int                         audiomuxs[ 5 ];     /* tuner, ext (line-in) */
400                                                             /* int/unused (radio) */
401                                                             /* mute, present */
402           u_int                         gpio_mux_bits;      /* GPIO mask for audio mux */
403 };
404 
405 struct format_params {
406   /* Total lines, lines before image, image lines */
407   int vtotal, vdelay, vactive;
408   /* Total unscaled horizontal pixels, pixels before image, image pixels */
409   int htotal, hdelay, hactive;
410   /* Scaled horizontal image pixels, Total Scaled horizontal pixels */
411   int  scaled_hactive, scaled_htotal;
412   /* frame rate . for ntsc is 30 frames per second */
413   int frame_rate;
414   /* A-delay and B-delay */
415   u_char adelay, bdelay;
416   /* Iform XTSEL value */
417   int iform_xtsel;
418   /* VBI number of lines per field, and number of samples per line */
419   int vbi_num_lines, vbi_num_samples;
420 };
421 
422 /* Bt848/878 register access
423  * The registers can either be access via a memory mapped structure
424  * or accessed via bus_space.
425  * bus_0pace access allows cross platform support, where as the
426  * memory mapped structure method only works on 32 bit processors
427  * with the right type of endianness.
428  */
429 #define INB(bktr,offset)      bus_space_read_1((bktr)->memt,(bktr)->memh,(offset))
430 #define INW(bktr,offset)      bus_space_read_2((bktr)->memt,(bktr)->memh,(offset))
431 #define INL(bktr,offset)      bus_space_read_4((bktr)->memt,(bktr)->memh,(offset))
432 #define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value))
433 #define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value))
434 #define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value))
435 
436 typedef struct bktr_clip bktr_clip_t;
437 
438 /*
439  * BrookTree 848  info structure, one per bt848 card installed.
440  */
441 struct bktr_softc {
442     int             mem_rid;  /* 4.x resource id */
443     struct resource *res_mem; /* 4.x resource descriptor for registers */
444     int             irq_rid;  /* 4.x resource id */
445     struct resource *res_irq; /* 4.x resource descriptor for interrupt */
446     void            *res_ih;  /* 4.x newbus interrupt handler cookie */
447     bus_space_tag_t memt;     /* Bus space register access functions */
448     bus_space_handle_t        memh;     /* Bus space register access functions */
449     bus_size_t                obmemsz;/* Size of card (bytes) */
450     char  bktr_xname[7];      /* device name and unit number */
451 
452     vm_offset_t bigbuf;            /* buffer that holds the captured image */
453     vm_offset_t vbidata;     /* RISC program puts VBI data from the current frame here */
454     vm_offset_t vbibuffer;   /* Circular buffer holding VBI data for the user */
455     vm_offset_t dma_prog;    /* RISC prog for single and/or even field capture*/
456     vm_offset_t odd_dma_prog;/* RISC program for Odd field capture */
457 
458     /* the following definitions are common over all platforms */
459     int             alloc_pages;        /* number of pages in bigbuf */
460     int         vbiinsert;      /* Position for next write into circular buffer */
461     int         vbistart;       /* Position of last read from circular buffer */
462     int         vbisize;        /* Number of bytes in the circular buffer */
463     uint32_t        vbi_sequence_number;          /* sequence number for VBI */
464     int             vbi_read_blocked;   /* user process blocked on read() from /dev/vbi */
465     struct kqinfo vbi_kq;     /* Data used by select()/poll()/kevent() on /dev/vbi */
466 
467 
468     struct proc     *proc;              /* process to receive raised signal */
469     int             signal;             /* signal to send to process */
470     int             clr_on_start;       /* clear cap buf on capture start? */
471 #define   METEOR_SIG_MODE_MASK          0xffff0000
472 #define   METEOR_SIG_FIELD_MODE         0x00010000
473 #define   METEOR_SIG_FRAME_MODE         0x00000000
474     char         dma_prog_loaded;
475     struct meteor_mem *mem;   /* used to control sync. multi-frame output */
476     u_long          synch_wait;         /* wait for free buffer before continuing */
477     short current;  /* frame number in buffer (1-frames) */
478     short rows;               /* number of rows in a frame */
479     short cols;               /* number of columns in a frame */
480     int             capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */
481     int             capture_area_y_offset; /* captured. The capture area allows for */
482     int             capture_area_x_size;   /* example 320x200 pixels from the centre */
483     int             capture_area_y_size;   /* of the video image to be captured. */
484     char  capture_area_enabled;  /* When TRUE use user's capture area. */
485     int             pixfmt;         /* active pixel format (idx into fmt tbl) */
486     int             pixfmt_compat;  /* Y/N - in meteor pix fmt compat mode */
487     u_long          format;             /* frame format rgb, yuv, etc.. */
488     short frames;             /* number of frames allocated */
489     int             frame_size;         /* number of bytes in a frame */
490     u_long          fifo_errors;        /* number of fifo capture errors since open */
491     u_long          dma_errors;         /* number of DMA capture errors since open */
492     u_long          frames_captured;/* number of frames captured since open */
493     u_long          even_fields_captured; /* number of even fields captured */
494     u_long          odd_fields_captured; /* number of odd fields captured */
495     u_long          range_enable;       /* enable range checking ?? */
496     u_short     capcontrol;     /* reg 0xdc capture control */
497     u_short     bktr_cap_ctl;
498     volatile u_int  flags;
499 #define   METEOR_INITALIZED   0x00000001
500 #define   METEOR_OPEN                   0x00000002
501 #define   METEOR_MMAP                   0x00000004
502 #define   METEOR_INTR                   0x00000008
503 #define   METEOR_READ                   0x00000010          /* XXX never gets referenced */
504 #define   METEOR_SINGLE                 0x00000020          /* get single frame */
505 #define   METEOR_CONTIN                 0x00000040          /* continuously get frames */
506 #define   METEOR_SYNCAP                 0x00000080          /* synchronously get frames */
507 #define   METEOR_CAP_MASK               0x000000f0
508 #define   METEOR_NTSC                   0x00000100
509 #define   METEOR_PAL                    0x00000200
510 #define   METEOR_SECAM                  0x00000400
511 #define   BROOKTREE_NTSC                0x00000100          /* used in video open() and */
512 #define   BROOKTREE_PAL                 0x00000200          /* in the kernel config */
513 #define   BROOKTREE_SECAM               0x00000400          /* file */
514 #define   METEOR_AUTOMODE               0x00000800
515 #define   METEOR_FORM_MASK    0x00000f00
516 #define   METEOR_DEV0                   0x00001000
517 #define   METEOR_DEV1                   0x00002000
518 #define   METEOR_DEV2                   0x00004000
519 #define   METEOR_DEV3                   0x00008000
520 #define METEOR_DEV_SVIDEO     0x00006000
521 #define METEOR_DEV_RGB                  0x0000a000
522 #define   METEOR_DEV_MASK               0x0000f000
523 #define   METEOR_RGB16                  0x00010000
524 #define   METEOR_RGB24                  0x00020000
525 #define   METEOR_YUV_PACKED   0x00040000
526 #define   METEOR_YUV_PLANAR   0x00080000
527 #define   METEOR_WANT_EVEN    0x00100000          /* want even frame */
528 #define   METEOR_WANT_ODD               0x00200000          /* want odd frame */
529 #define   METEOR_WANT_MASK    0x00300000
530 #define METEOR_ONLY_EVEN_FIELDS         0x01000000
531 #define METEOR_ONLY_ODD_FIELDS          0x02000000
532 #define METEOR_ONLY_FIELDS_MASK 0x03000000
533 #define METEOR_YUV_422                  0x04000000
534 #define   METEOR_OUTPUT_FMT_MASK        0x040f0000
535 #define   METEOR_WANT_TS                0x08000000          /* time-stamp a frame */
536 #define METEOR_RGB            0x20000000          /* meteor rgb unit */
537 #define METEOR_FIELD_MODE     0x80000000
538     u_char          tflags;                                 /* Tuner flags (/dev/tuner) */
539 #define   TUNER_INITALIZED    0x00000001
540 #define   TUNER_OPEN                    0x00000002
541     u_char      vbiflags;                         /* VBI flags (/dev/vbi) */
542 #define VBI_INITALIZED          0x00000001
543 #define VBI_OPEN                0x00000002
544 #define VBI_CAPTURE             0x00000004
545     u_short         fps;                /* frames per second */
546     struct meteor_video video;
547     struct TVTUNER  tuner;
548     struct CARDTYPE card;
549     u_char                    audio_mux_select;   /* current mode of the audio */
550     u_char                    audio_mute_state;   /* mute state of the audio */
551     u_char                    format_params;
552     u_long              current_sol;
553     u_long              current_col;
554     int                 clip_start;
555     int                 line_length;
556     int                 last_y;
557     int                 y;
558     int                 y2;
559     int                 yclip;
560     int                 yclip2;
561     int                 max_clip_node;
562     bktr_clip_t               clip_list[100];
563     int                 reverse_mute;             /* Swap the GPIO values for Mute and TV Audio */
564     int                 bt848_tuner;
565     int                 bt848_card;
566     u_long              id;
567 #define BT848_USE_XTALS 0
568 #define BT848_USE_PLL   1
569     int                       xtal_pll_mode;      /* Use XTAL or PLL mode for PAL/SECAM */
570     int                       remote_control;      /* remote control detected */
571     int                       remote_control_addr;   /* remote control i2c address */
572     char            msp_version_string[9]; /* MSP version string 34xxx-xx */
573     int                       msp_addr;        /* MSP i2c address */
574     char            dpl_version_string[9]; /* DPL version string 35xxx-xx */
575     int                       dpl_addr;        /* DPL i2c address */
576     int                 slow_msp_audio;        /* 0 = use fast MSP3410/3415 programming sequence */
577                                                          /* 1 = use slow MSP3410/3415 programming sequence */
578                                                          /* 2 = use Tuner's Mono audio output via the MSP chip */
579     int                 msp_use_mono_source;   /* use Tuner's Mono audio output via the MSP chip */
580     int                 audio_mux_present;     /* 1 = has audio mux on GPIO lines, 0 = no audio mux */
581     int                 msp_source_selected;   /* 0 = TV source, 1 = Line In source, 2 = FM Radio Source */
582 
583 #ifdef BKTR_NEW_MSP34XX_DRIVER
584     /* msp3400c related data */
585     void *                    msp3400c_info;
586     int                       stereo_once;
587     int                       amsound;
588     int                       mspsimple;
589     int                       dolby;
590 #endif
591 
592 };
593 
594 typedef struct bktr_softc bktr_reg_t;
595 typedef struct bktr_softc* bktr_ptr_t;
596 
597 #define Bt848_MAX_SIGN 16
598 
599 struct bt848_card_sig {
600   int card;
601   int tuner;
602   u_char signature[Bt848_MAX_SIGN];
603 };
604 
605 
606 /***********************************************************/
607 /* ioctl_cmd_t int on old versions, u_long on new versions */
608 /***********************************************************/
609 
610 typedef u_long ioctl_cmd_t;
611