1 /*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "dm_services.h"
27
28 #include "include/gpio_types.h"
29 #include "hw_gpio.h"
30 #include "hw_ddc.h"
31
32 #include "reg_helper.h"
33 #include "gpio_regs.h"
34
35
36 #undef FN
37 #define FN(reg_name, field_name) \
38 ddc->shifts->field_name, ddc->masks->field_name
39
40 #define CTX \
41 ddc->base.base.ctx
42 #define REG(reg)\
43 (ddc->regs->reg)
44
destruct(struct hw_ddc * pin)45 static void destruct(
46 struct hw_ddc *pin)
47 {
48 dal_hw_gpio_destruct(&pin->base);
49 }
50
destroy(struct hw_gpio_pin ** ptr)51 static void destroy(
52 struct hw_gpio_pin **ptr)
53 {
54 struct hw_ddc *pin = HW_DDC_FROM_BASE(*ptr);
55
56 destruct(pin);
57
58 kfree(pin);
59
60 *ptr = NULL;
61 }
62
set_config(struct hw_gpio_pin * ptr,const struct gpio_config_data * config_data)63 static enum gpio_result set_config(
64 struct hw_gpio_pin *ptr,
65 const struct gpio_config_data *config_data)
66 {
67 struct hw_ddc *ddc = HW_DDC_FROM_BASE(ptr);
68 struct hw_gpio *hw_gpio = NULL;
69 uint32_t regval;
70 uint32_t ddc_data_pd_en = 0;
71 uint32_t ddc_clk_pd_en = 0;
72 uint32_t aux_pad_mode = 0;
73
74 hw_gpio = &ddc->base;
75
76 if (hw_gpio == NULL) {
77 ASSERT_CRITICAL(false);
78 return GPIO_RESULT_NULL_HANDLE;
79 }
80
81 regval = REG_GET_3(gpio.MASK_reg,
82 DC_GPIO_DDC1DATA_PD_EN, &ddc_data_pd_en,
83 DC_GPIO_DDC1CLK_PD_EN, &ddc_clk_pd_en,
84 AUX_PAD1_MODE, &aux_pad_mode);
85
86 switch (config_data->config.ddc.type) {
87 case GPIO_DDC_CONFIG_TYPE_MODE_I2C:
88 /* On plug-in, there is a transient level on the pad
89 * which must be discharged through the internal pull-down.
90 * Enable internal pull-down, 2.5msec discharge time
91 * is required for detection of AUX mode */
92 if (hw_gpio->base.en != GPIO_DDC_LINE_VIP_PAD) {
93 if (!ddc_data_pd_en || !ddc_clk_pd_en) {
94
95 REG_SET_2(gpio.MASK_reg, regval,
96 DC_GPIO_DDC1DATA_PD_EN, 1,
97 DC_GPIO_DDC1CLK_PD_EN, 1);
98
99 if (config_data->type ==
100 GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE)
101 msleep(3);
102 }
103 } else {
104 uint32_t reg2;
105 uint32_t sda_pd_dis = 0;
106 uint32_t scl_pd_dis = 0;
107
108 reg2 = REG_GET_2(gpio.MASK_reg,
109 DC_GPIO_SDA_PD_DIS, &sda_pd_dis,
110 DC_GPIO_SCL_PD_DIS, &scl_pd_dis);
111
112 if (sda_pd_dis) {
113 REG_SET(gpio.MASK_reg, regval,
114 DC_GPIO_SDA_PD_DIS, 0);
115
116 if (config_data->type ==
117 GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE)
118 msleep(3);
119 }
120
121 if (!scl_pd_dis) {
122 REG_SET(gpio.MASK_reg, regval,
123 DC_GPIO_SCL_PD_DIS, 1);
124
125 if (config_data->type ==
126 GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE)
127 msleep(3);
128 }
129 }
130
131 if (aux_pad_mode) {
132 /* let pins to get de-asserted
133 * before setting pad to I2C mode */
134 if (config_data->config.ddc.data_en_bit_present ||
135 config_data->config.ddc.clock_en_bit_present)
136 /* [anaumov] in DAL2, there was
137 * dc_service_delay_in_microseconds(2000); */
138 msleep(2);
139
140 /* set the I2C pad mode */
141 /* read the register again,
142 * some bits may have been changed */
143 REG_UPDATE(gpio.MASK_reg,
144 AUX_PAD1_MODE, 0);
145 }
146
147 return GPIO_RESULT_OK;
148 case GPIO_DDC_CONFIG_TYPE_MODE_AUX:
149 /* set the AUX pad mode */
150 if (!aux_pad_mode) {
151 REG_SET(gpio.MASK_reg, regval,
152 AUX_PAD1_MODE, 1);
153 }
154
155 return GPIO_RESULT_OK;
156 case GPIO_DDC_CONFIG_TYPE_POLL_FOR_CONNECT:
157 if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) &&
158 (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) {
159 REG_UPDATE_3(ddc_setup,
160 DC_I2C_DDC1_ENABLE, 1,
161 DC_I2C_DDC1_EDID_DETECT_ENABLE, 1,
162 DC_I2C_DDC1_EDID_DETECT_MODE, 0);
163 return GPIO_RESULT_OK;
164 }
165 break;
166 case GPIO_DDC_CONFIG_TYPE_POLL_FOR_DISCONNECT:
167 if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) &&
168 (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) {
169 REG_UPDATE_3(ddc_setup,
170 DC_I2C_DDC1_ENABLE, 1,
171 DC_I2C_DDC1_EDID_DETECT_ENABLE, 1,
172 DC_I2C_DDC1_EDID_DETECT_MODE, 1);
173 return GPIO_RESULT_OK;
174 }
175 break;
176 case GPIO_DDC_CONFIG_TYPE_DISABLE_POLLING:
177 if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) &&
178 (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) {
179 REG_UPDATE_2(ddc_setup,
180 DC_I2C_DDC1_ENABLE, 0,
181 DC_I2C_DDC1_EDID_DETECT_ENABLE, 0);
182 return GPIO_RESULT_OK;
183 }
184 break;
185 }
186
187 BREAK_TO_DEBUGGER();
188
189 return GPIO_RESULT_NON_SPECIFIC_ERROR;
190 }
191
192 static const struct hw_gpio_pin_funcs funcs = {
193 .destroy = destroy,
194 .open = dal_hw_gpio_open,
195 .get_value = dal_hw_gpio_get_value,
196 .set_value = dal_hw_gpio_set_value,
197 .set_config = set_config,
198 .change_mode = dal_hw_gpio_change_mode,
199 .close = dal_hw_gpio_close,
200 };
201
construct(struct hw_ddc * ddc,enum gpio_id id,uint32_t en,struct dc_context * ctx)202 static void construct(
203 struct hw_ddc *ddc,
204 enum gpio_id id,
205 uint32_t en,
206 struct dc_context *ctx)
207 {
208 dal_hw_gpio_construct(&ddc->base, id, en, ctx);
209 ddc->base.base.funcs = &funcs;
210 }
211
dal_hw_ddc_create(struct dc_context * ctx,enum gpio_id id,uint32_t en)212 struct hw_gpio_pin *dal_hw_ddc_create(
213 struct dc_context *ctx,
214 enum gpio_id id,
215 uint32_t en)
216 {
217 struct hw_ddc *pin;
218
219 if ((en < GPIO_DDC_LINE_MIN) || (en > GPIO_DDC_LINE_MAX)) {
220 ASSERT_CRITICAL(false);
221 return NULL;
222 }
223
224 pin = kzalloc(sizeof(struct hw_ddc), GFP_KERNEL);
225 if (!pin) {
226 ASSERT_CRITICAL(false);
227 return NULL;
228 }
229
230 construct(pin, id, en, ctx);
231 return &pin->base.base;
232 }
233