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Searched refs:CVT (Results 1 – 13 of 13) sorted by relevance

/NextBSD/contrib/llvm/lib/Target/X86/
HDX86SelectionDAGInfo.cpp171 EVT CVT = Count.getValueType(); in EmitTargetCodeForMemset() local
172 SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count, in EmitTargetCodeForMemset()
174 CVT)); in EmitTargetCodeForMemset()
175 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX : in EmitTargetCodeForMemset()
HDX86SchedHaswell.td1818 // CVT(T)PD2DQ.
1820 def : InstRW<[WriteP1_P5_Lat4], (instregex "(V?)CVT(T?)PD2DQrr")>;
1822 def : InstRW<[WriteP1_P5_Lat4Ld], (instregex "(V?)CVT(T?)PD2DQrm")>;
1828 // CVT(T)PS2PI.
1836 // CVT(T)PD2PI.
1842 def : InstRW<[WriteP1_P5_Lat4], (instregex "(Int_)?(V?)CVT(T?)SI2SS(64)?rr")>;
1844 // CVT(T)SS2SI.
1846 def : InstRW<[WriteP0_P1_Lat4], (instregex "(Int_)?(V?)CVT(T?)SS2SI(64)?rr")>;
1848 def : InstRW<[WriteP0_P1_Lat4Ld], (instregex "(Int_)?(V?)CVT(T?)SS2SI(64)?rm")>;
1856 def : InstRW<[WriteP0_P1_Lat4], (instregex "(Int_)?(V?)CVT(T?)SD2SI(64)?rr")>;
[all …]
HDX86ISelLowering.cpp5170 EVT CVT = Ld.getValueType(); in LowerVectorBroadcast() local
5171 assert(!CVT.isVector() && "Must not broadcast a vector type"); in LowerVectorBroadcast()
5191 Ld = DAG.getLoad(CVT, dl, DAG.getEntryNode(), CP, in LowerVectorBroadcast()
/NextBSD/usr.bin/xlint/lint1/
HDtree.c195 { CVT, { 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0, in initmtab()
817 for (tn=ln; tn->tn_op==CVT && !tn->tn_cast; tn=tn->tn_left) in typeok()
820 for (tn=rn; tn->tn_op==CVT && !tn->tn_cast; tn=tn->tn_left) in typeok()
856 if (ln->tn_op == CVT && ln->tn_cast && in typeok()
874 if (ln->tn_op == CVT && ln->tn_cast && in typeok()
1037 while (rn->tn_op == CVT) in typeok()
1128 if (ln->tn_op == CVT && ln->tn_cast && in typeok()
1153 case CVT: in typeok()
1691 ntn->tn_op = CVT; in convert()
1693 ntn->tn_cast = op == CVT; in convert()
[all …]
HDop.h111 CVT, enumerator
HDfunc.c1008 while ((op = rn->tn_op) == CVT || op == PLUS) in doreturn()
/NextBSD/contrib/llvm/utils/TableGen/
HDDAGISelMatcher.cpp441 if (const CheckValueTypeMatcher *CVT = dyn_cast<CheckValueTypeMatcher>(M)) in isContradictoryImpl() local
442 return CVT->getTypeName() != getTypeName(); in isContradictoryImpl()
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64SchedA57.td439 def : InstRW<[A57Write_5cyc_1V], (instregex "^[FVSU]CVT([AMNPZ][SU])?(_Int)?(v2f32|v1i32|v2i32|v1i6…
441 def : InstRW<[A57Write_5cyc_2V], (instregex "^[FVSU]CVT([AMNPZ][SU])?(_Int)?(v4f32|v2f64|v4i32|v2i6…
548 def : InstRW<[A57Write_10cyc_1L_1V], (instregex "^[FSU]CVT[AMNPZ][SU](_Int)?[SU]?[XW]?[DS]?[rds]i?"…
/NextBSD/sys/dev/mwl/
HDif_mwl.c2424 #define CVT(_dst, _src) do { \ in mwl_node_getmimoinfo() macro
2444 CVT(mi->rssi[0], mn->mn_ai.rssi_a); in mwl_node_getmimoinfo()
2445 CVT(mi->rssi[1], mn->mn_ai.rssi_b); in mwl_node_getmimoinfo()
2446 CVT(mi->rssi[2], mn->mn_ai.rssi_c); in mwl_node_getmimoinfo()
2451 #undef CVT in mwl_node_getmimoinfo()
/NextBSD/contrib/tzdata/
HDafrica124 # Shanks gives 1907 for the transition to CVT.
131 -2:00 - CVT 1942 Sep
133 -2:00 - CVT 1975 Nov 25 2:00
134 -1:00 - CVT
/NextBSD/contrib/tzcode/zic/
HDTheory340 append `T' to the country's ISO code, e.g. `CVT' for
/NextBSD/contrib/llvm/lib/Target/NVPTX/
HDNVPTXInstrInfo.td35 // CVT conversion modes
/NextBSD/contrib/ncurses/misc/
HDterminfo.src20889 # CVT Cursor Vertical Tab \E [ Pn Y - eF - (H)
21058 # (H) ECMA calls this "Cursor Line Tabulation" but preserves the CVT