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Searched refs:DPLLB_LVDS_P2_CLOCK_DIV_14 (Results 1 – 3 of 3) sorted by relevance

/NextBSD/sys/dev/drm/
HDi915_reg.h361 #define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */ macro
/NextBSD/sys/dev/drm2/i915/
HDi915_reg.h960 #define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */ macro
HDintel_display.c3861 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_14; in i9xx_update_pll()
4568 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_14; in ironlake_crtc_mode_set()