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Searched refs:FP_TO_FP16 (Results 1 – 10 of 10) sorted by relevance

/NextBSD/contrib/llvm/include/llvm/CodeGen/
HDISDOpcodes.h500 FP16_TO_FP, FP_TO_FP16, enumerator
/NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/
HDLegalizeFloatTypes.cpp450 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, Op); in SoftenFloatRes_FP_ROUND()
562 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0)); in SoftenFloatRes_FTRUNC()
692 case ISD::FP_TO_FP16: // Same as FP_ROUND for softening purposes in SoftenFloatOperand()
740 assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16); in SoftenFloatOp_FP_ROUND()
744 EVT FloatRVT = N->getOpcode() == ISD::FP_TO_FP16 ? MVT::f16 : RVT; in SoftenFloatOp_FP_ROUND()
1602 return ISD::FP_TO_FP16; in GetPromotionOpcode()
1733 case ISD::FP_TO_FP16: in PromoteFloatResult()
HDSelectionDAGDumper.cpp250 case ISD::FP_TO_FP16: return "fp_to_fp16"; in getOperationName()
HDLegalizeDAG.cpp1210 case ISD::FP_TO_FP16: in LegalizeOp()
3503 case ISD::FP_TO_FP16: { in ExpandNode()
3508 TLI.isOperationLegalOrCustom(ISD::FP_TO_FP16, MVT::f32)) { in ExpandNode()
3514 DAG.getNode(ISD::FP_TO_FP16, dl, MVT::i16, FloatVal)); in ExpandNode()
HDLegalizeIntegerTypes.cpp107 case ISD::FP_TO_FP16: Res = PromoteIntRes_FP_TO_FP16(N); break; in PromoteIntegerResult()
262 SDValue Trunc = DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, PromotedOp); in PromoteIntRes_BITCAST()
HDDAGCombiner.cpp1410 case ISD::FP_TO_FP16: return visitFP_TO_FP16(N); in visit()
/NextBSD/contrib/llvm/include/llvm/Target/
HDTargetSelectionDAG.td439 def fp_to_f16 : SDNode<"ISD::FP_TO_FP16" , SDTFPToIntOp>;
/NextBSD/contrib/llvm/lib/Target/Mips/
HDMipsISelLowering.cpp378 setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand); in MipsTargetLowering()
380 setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand); in MipsTargetLowering()
/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMISelLowering.cpp901 setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand); in ARMTargetLowering()
907 setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand); in ARMTargetLowering()
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86ISelLowering.cpp367 setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand); in X86TargetLowering()
373 setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand); in X86TargetLowering()
374 setOperationAction(ISD::FP_TO_FP16, MVT::f80, Expand); in X86TargetLowering()