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Searched refs:FP_TO_UINT (Results 1 – 25 of 27) sorted by relevance

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/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMTargetTransformInfo.cpp130 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
132 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 }, in getCastInstrCost()
134 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
148 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
150 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 }, in getCastInstrCost()
152 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 } in getCastInstrCost()
166 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
168 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
170 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
172 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
[all …]
HDARMISelLowering.cpp107 setOperationAction(ISD::FP_TO_UINT, VT, Custom); in addTypeForNEON()
112 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addTypeForNEON()
532 setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom); in ARMTargetLowering()
588 setTargetDAGCombine(ISD::FP_TO_UINT); in ARMTargetLowering()
640 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in ARMTargetLowering()
642 setOperationAction(ISD::FP_TO_UINT, MVT::f64, Custom); in ARMTargetLowering()
6575 case ISD::FP_TO_UINT: return LowerFP_TO_INT(Op, DAG); in LowerOperation()
10111 case ISD::FP_TO_UINT: return PerformVCVTCombine(N, DCI, Subtarget); in PerformDAGCombine()
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64TargetTransformInfo.cpp226 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
227 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
228 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
234 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f32, 2 }, in getCastInstrCost()
235 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 1 }, in getCastInstrCost()
236 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost()
241 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
242 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 2 }, in getCastInstrCost()
248 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
249 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f64, 2 }, in getCastInstrCost()
[all …]
HDAArch64ISelLowering.cpp190 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in AArch64TargetLowering()
191 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in AArch64TargetLowering()
192 setOperationAction(ISD::FP_TO_UINT, MVT::i128, Custom); in AArch64TargetLowering()
549 setOperationAction(ISD::FP_TO_UINT, MVT::v1i64, Expand); in AArch64TargetLowering()
681 setOperationAction(ISD::FP_TO_UINT, VT.getSimpleVT(), Custom); in addTypeForNEON()
2029 case ISD::FP_TO_UINT: in LowerOperation()
9168 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/NextBSD/contrib/llvm/include/llvm/CodeGen/
HDISDOpcodes.h437 FP_TO_UINT, enumerator
/NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/
HDLegalizeVectorOps.cpp296 case ISD::FP_TO_UINT: in LegalizeOp()
382 case ISD::FP_TO_UINT: in Promote()
473 if (!isSigned && TLI.isOperationLegalOrCustom(ISD::FP_TO_UINT, NewVT)) { in PromoteFP_TO_INT()
474 NewOpc = ISD::FP_TO_UINT; in PromoteFP_TO_INT()
HDSelectionDAGDumper.cpp246 case ISD::FP_TO_UINT: return "fp_to_uint"; in getOperationName()
HDLegalizeVectorTypes.cpp89 case ISD::FP_TO_UINT: in ScalarizeVectorResult()
434 case ISD::FP_TO_UINT: in ScalarizeVectorOperand()
637 case ISD::FP_TO_UINT: in SplitVectorResult()
1376 case ISD::FP_TO_UINT: in SplitVectorOperand()
1983 case ISD::FP_TO_UINT: in WidenVectorResult()
2844 case ISD::FP_TO_UINT: in WidenVectorOperand()
HDLegalizeIntegerTypes.cpp105 case ISD::FP_TO_UINT: Res = PromoteIntRes_FP_TO_XINT(N); break; in PromoteIntegerResult()
406 if (N->getOpcode() == ISD::FP_TO_UINT && in PromoteIntRes_FP_TO_XINT()
407 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) && in PromoteIntRes_FP_TO_XINT()
416 return DAG.getNode(N->getOpcode() == ISD::FP_TO_UINT ? in PromoteIntRes_FP_TO_XINT()
1270 case ISD::FP_TO_UINT: ExpandIntRes_FP_TO_UINT(N, Lo, Hi); break; in ExpandIntegerResult()
HDLegalizeFloatTypes.cpp695 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_UINT(N); break; in SoftenFloatOperand()
1386 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break; in ExpandFloatOperand()
1623 case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break; in PromoteFloatOperand()
HDLegalizeDAG.cpp2699 if (!isSigned && TLI.isOperationLegalOrCustom(ISD::FP_TO_UINT, NewOutTy)) { in PromoteLegalFP_TO_INT()
2700 OpToUse = ISD::FP_TO_UINT; in PromoteLegalFP_TO_INT()
3087 case ISD::FP_TO_UINT: { in ExpandNode()
4150 case ISD::FP_TO_UINT: in PromoteNode()
HDSelectionDAG.cpp2908 case ISD::FP_TO_UINT: { in getNode()
2947 case ISD::FP_TO_UINT: in getNode()
/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDAMDGPUISelLowering.cpp314 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in AMDGPUTargetLowering()
337 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in AMDGPUTargetLowering()
645 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG); in LowerOperation()
1592 ISD::NodeType ToInt = sign ? ISD::FP_TO_SINT : ISD::FP_TO_UINT; in LowerDIVREM24()
2268 SDValue Hi = DAG.getNode(Signed ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, SL, in LowerFP64_TO_INT()
2270 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma); in LowerFP64_TO_INT()
HDR600ISelLowering.cpp85 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Custom); in R600TargetLowering()
87 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in R600TargetLowering()
863 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86TargetTransformInfo.cpp649 { ISD::FP_TO_UINT, MVT::v8i32, MVT::v8f32, 8*4 }, in getCastInstrCost()
650 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f64, 4*4 }, in getCastInstrCost()
HDX86InstrFragmentsSIMD.td399 def X86VFpToUintRnd : SDNode<"ISD::FP_TO_UINT", SDTVFPToIntRound>;
401 def X86VFpToUlongRnd : SDNode<"ISD::FP_TO_UINT", SDTVFPToLongRound>;
HDX86ISelLowering.cpp230 setOperationAction(ISD::FP_TO_UINT , MVT::i1 , Promote); in X86TargetLowering()
231 setOperationAction(ISD::FP_TO_UINT , MVT::i8 , Promote); in X86TargetLowering()
232 setOperationAction(ISD::FP_TO_UINT , MVT::i16 , Promote); in X86TargetLowering()
235 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Expand); in X86TargetLowering()
236 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote); in X86TargetLowering()
243 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Expand); in X86TargetLowering()
247 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Custom); in X86TargetLowering()
253 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Custom); in X86TargetLowering()
724 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in X86TargetLowering()
1080 setOperationAction(ISD::FP_TO_UINT, MVT::v8i16, Promote); in X86TargetLowering()
[all …]
/NextBSD/contrib/llvm/lib/Target/PowerPC/
HDPPCISelLowering.cpp356 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in PPCTargetLowering()
361 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
367 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in PPCTargetLowering()
374 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in PPCTargetLowering()
380 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
501 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); in PPCTargetLowering()
618 setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal); in PPCTargetLowering()
664 setOperationAction(ISD::FP_TO_UINT , MVT::v4f64, Expand); in PPCTargetLowering()
714 setOperationAction(ISD::FP_TO_UINT , MVT::v4f32, Expand); in PPCTargetLowering()
6194 (Op.getOpcode() == ISD::FP_TO_UINT || in canReuseLoadAddress()
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/NextBSD/contrib/llvm/lib/Target/Sparc/
HDSparcISelLowering.cpp1430 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in SparcTargetLowering()
1432 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in SparcTargetLowering()
2808 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG, *this, in LowerOperation()
3199 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonISelLowering.cpp1551 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in HexagonTargetLowering()
1552 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in HexagonTargetLowering()
1553 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote); in HexagonTargetLowering()
/NextBSD/contrib/llvm/lib/CodeGen/
HDTargetLoweringBase.cpp1577 case FPToUI: return ISD::FP_TO_UINT; in InstructionOpcodeToISD()
/NextBSD/contrib/llvm/lib/Target/Mips/
HDMipsSEISelLowering.cpp280 setOperationAction(ISD::FP_TO_UINT, Ty, Legal); in addMSAIntType()
1894 return DAG.getNode(ISD::FP_TO_UINT, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
HDMipsISelLowering.cpp331 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in MipsTargetLowering()
332 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in MipsTargetLowering()
/NextBSD/contrib/llvm/include/llvm/Target/
HDTargetSelectionDAG.td437 def fp_to_uint : SDNode<"ISD::FP_TO_UINT" , SDTFPToIntOp>;
/NextBSD/contrib/llvm/lib/Target/SystemZ/
HDSystemZISelLowering.cpp202 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in SystemZTargetLowering()
347 setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal); in SystemZTargetLowering()

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