| /NextBSD/contrib/llvm/lib/Target/BPF/ |
| HD | BPFISelDAGToDAG.cpp | 133 case ISD::INTRINSIC_W_CHAIN: { in Select()
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| /NextBSD/contrib/llvm/include/llvm/CodeGen/ |
| HD | ISDOpcodes.h | 150 INTRINSIC_W_CHAIN, enumerator
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| HD | SelectionDAGNodes.h | 404 return (NodeType == ISD::INTRINSIC_W_CHAIN ||
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| /NextBSD/contrib/llvm/lib/Target/XCore/ |
| HD | XCoreISelDAGToDAG.cpp | 236 if (Addr->getOpcode() != ISD::INTRINSIC_W_CHAIN) in SelectBRIND()
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| HD | XCoreISelLowering.cpp | 184 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in XCoreTargetLowering() 1876 case ISD::INTRINSIC_W_CHAIN: in computeKnownBitsForTargetNode()
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| /NextBSD/contrib/llvm/lib/Target/NVPTX/ |
| HD | NVPTXISelLowering.cpp | 203 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom); in NVPTXTargetLowering() 246 setOperationAction(ISD::INTRINSIC_W_CHAIN, VT, Custom); in NVPTXTargetLowering() 251 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i8, Custom); in NVPTXTargetLowering() 1813 case ISD::INTRINSIC_W_CHAIN: in LowerOperation() 3270 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 3282 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 3296 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 3317 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 4483 DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, DL, LdResVTs, Ops, in ReplaceINTRINSIC_W_CHAIN() 4502 case ISD::INTRINSIC_W_CHAIN: in ReplaceNodeResults()
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| HD | NVPTXISelDAGToDAG.cpp | 155 case ISD::INTRINSIC_W_CHAIN: in Select() 1248 if (N->getOpcode() == ISD::INTRINSIC_W_CHAIN) { in SelectLDGLDU() 1285 case ISD::INTRINSIC_W_CHAIN: in SelectLDGLDU() 1428 case ISD::INTRINSIC_W_CHAIN: in SelectLDGLDU() 1566 case ISD::INTRINSIC_W_CHAIN: in SelectLDGLDU() 1710 case ISD::INTRINSIC_W_CHAIN: in SelectLDGLDU() 1848 case ISD::INTRINSIC_W_CHAIN: in SelectLDGLDU()
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| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | SelectionDAGDumper.cpp | 111 case ISD::INTRINSIC_W_CHAIN: { in getOperationName()
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| HD | TargetLowering.cpp | 1133 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || in computeKnownBitsForTargetNode() 1148 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || in ComputeNumSignBitsForTargetNode()
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| HD | SelectionDAG.cpp | 2478 case ISD::INTRINSIC_W_CHAIN: in computeKnownBits() 2708 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || in ComputeNumSignBits() 4838 Opcode == ISD::INTRINSIC_W_CHAIN || in getMemIntrinsicNode()
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| HD | LegalizeDAG.cpp | 1198 case ISD::INTRINSIC_W_CHAIN: in LegalizeOp() 4087 case ISD::INTRINSIC_W_CHAIN: in ExpandNode()
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| HD | SelectionDAGISel.cpp | 3379 if (N->getOpcode() != ISD::INTRINSIC_W_CHAIN && in CannotYetSelect()
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| HD | SelectionDAGBuilder.cpp | 3419 Info.opc == ISD::INTRINSIC_W_CHAIN) in visitTargetIntrinsic() 3449 Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurSDLoc(), VTs, Ops); in visitTargetIntrinsic()
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| /NextBSD/contrib/llvm/lib/Target/PowerPC/ |
| HD | PPCISelLowering.cpp | 337 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i1, Custom); in PPCTargetLowering() 837 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in PPCTargetLowering() 6869 SDValue LoadedVect = DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, in LowerBUILD_VECTOR() 7939 case ISD::INTRINSIC_W_CHAIN: return SDValue(); in LowerOperation() 7963 case ISD::INTRINSIC_W_CHAIN: { in ReplaceNodeResults() 9209 if (N->getOpcode() == ISD::INTRINSIC_W_CHAIN) { in isConsecutiveLS() 10022 case ISD::INTRINSIC_W_CHAIN: { in expandVSXLoadForLE() 10288 DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, dl, in PerformDAGCombine() 10318 DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, dl, in PerformDAGCombine() 10411 case ISD::INTRINSIC_W_CHAIN: { in PerformDAGCombine() [all …]
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| /NextBSD/contrib/llvm/lib/Target/Mips/ |
| HD | MipsSEISelDAGToDAG.cpp | 799 case ISD::INTRINSIC_W_CHAIN: { in selectNode()
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| HD | MipsSEISelLowering.cpp | 134 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom); in MipsSETargetLowering() 147 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom); in MipsSETargetLowering() 374 case ISD::INTRINSIC_W_CHAIN: return lowerINTRINSIC_W_CHAIN(Op, DAG); in LowerOperation()
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMISelLowering.cpp | 574 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in ARMTargetLowering() 6530 Cycles32 = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, in ReplaceREADCYCLECOUNTER() 9042 N->getOpcode() == ISD::INTRINSIC_W_CHAIN); in CombineBaseUpdate() 9264 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP() 10130 case ISD::INTRINSIC_W_CHAIN: in PerformDAGCombine() 10716 case ISD::INTRINSIC_W_CHAIN: { in computeKnownBitsForTargetNode() 11186 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 11231 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 11245 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 11257 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() [all …]
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| HD | ARMISelDAGToDAG.cpp | 3059 case ISD::INTRINSIC_W_CHAIN: { in Select()
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| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | SIISelLowering.cpp | 883 assert(Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN); in LowerBRCOND() 896 Res.size() > 1 ? ISD::INTRINSIC_W_CHAIN : ISD::INTRINSIC_VOID, DL, in LowerBRCOND()
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| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelLowering.cpp | 498 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in AArch64TargetLowering() 732 case ISD::INTRINSIC_W_CHAIN: { in computeKnownBitsForTargetNode() 6452 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 6494 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 6507 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 6519 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 6531 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 8995 case ISD::INTRINSIC_W_CHAIN: in PerformDAGCombine()
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| HD | AArch64ISelDAGToDAG.cpp | 2358 case ISD::INTRINSIC_W_CHAIN: { in Select()
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86ISelDAGToDAG.cpp | 1393 Parent->getOpcode() != ISD::INTRINSIC_W_CHAIN && // unaligned loads, fixme in SelectAddr() 2151 case ISD::INTRINSIC_W_CHAIN: { in Select()
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| /NextBSD/contrib/llvm/lib/Target/SystemZ/ |
| HD | SystemZISelLowering.cpp | 443 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom); in SystemZTargetLowering() 2047 if (CmpOp0.getOpcode() == ISD::INTRINSIC_W_CHAIN && in getCmp() 2100 case ISD::INTRINSIC_W_CHAIN: in emitCmp() 4358 case ISD::INTRINSIC_W_CHAIN: in LowerOperation()
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| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonISelDAGToDAG.cpp | 1298 case ISD::INTRINSIC_W_CHAIN: in Select()
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| /NextBSD/contrib/llvm/include/llvm/Target/ |
| HD | TargetSelectionDAG.td | 538 def intrinsic_w_chain : SDNode<"ISD::INTRINSIC_W_CHAIN",
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