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Searched refs:Ld (Results 1 – 23 of 23) sorted by relevance

/NextBSD/contrib/llvm/lib/CodeGen/
HDGCRootLowering.cpp226 Value *Ld = new LoadInst(CI->getArgOperand(1), "", CI); in PerformDefaultLowering() local
227 Ld->takeName(CI); in PerformDefaultLowering()
228 CI->replaceAllUsesWith(Ld); in PerformDefaultLowering()
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64ISelDAGToDAG.cpp1085 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectLoad() local
1086 SDValue SuperReg = SDValue(Ld, 0); in SelectLoad()
1091 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 1)); in SelectLoad()
1108 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectPostLoad() local
1111 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 0)); in SelectPostLoad()
1114 SDValue SuperReg = SDValue(Ld, 1); in SelectPostLoad()
1123 ReplaceUses(SDValue(N, NumVecs + 1), SDValue(Ld, 2)); in SelectPostLoad()
1221 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectLoadLane() local
1222 SDValue SuperReg = SDValue(Ld, 0); in SelectLoadLane()
1234 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 1)); in SelectLoadLane()
[all …]
HDAArch64InstrFormats.td9022 !cast<Instruction>(instr # "Ld")>;
/NextBSD/contrib/llvm/lib/Analysis/
HDLoopAccessAnalysis.cpp1355 LoadInst *Ld = dyn_cast<LoadInst>(it); in analyzeLoop() local
1356 if (!Ld || (!Ld->isSimple() && !IsAnnotatedParallel)) { in analyzeLoop()
1357 emitAnalysis(LoopAccessReport(Ld) in analyzeLoop()
1364 Loads.push_back(Ld); in analyzeLoop()
1365 DepChecker.addAccess(Ld); in analyzeLoop()
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86ISelLowering.cpp3412 } else if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(Arg)) { in MatchingStackOffset() local
3420 SDValue Ptr = Ld->getBasePtr(); in MatchingStackOffset()
5084 SDValue Ld; in LowerVectorBroadcast() local
5102 Ld = Splat; in LowerVectorBroadcast()
5103 ConstSplatVal = (Ld.getOpcode() == ISD::Constant || in LowerVectorBroadcast()
5104 Ld.getOpcode() == ISD::ConstantFP); in LowerVectorBroadcast()
5108 if (!ConstSplatVal && !BVOp->isOnlyUserOf(Ld.getNode())) in LowerVectorBroadcast()
5134 Ld = Sc.getOperand(0); in LowerVectorBroadcast()
5135 ConstSplatVal = (Ld.getOpcode() == ISD::Constant || in LowerVectorBroadcast()
5136 Ld.getOpcode() == ISD::ConstantFP); in LowerVectorBroadcast()
[all …]
HDX86Schedule.td35 def Ld : SchedWrite;
38 let Folded = !cast<SchedWrite>(NAME#"Ld");
/NextBSD/contrib/llvm/lib/Transforms/Scalar/
HDLoopInterchange.cpp94 LoadInst *Ld = dyn_cast<LoadInst>(I); in populateDependencyMatrix() local
96 if (!St && !Ld) in populateDependencyMatrix()
98 if (Ld && !Ld->isSimple()) in populateDependencyMatrix()
/NextBSD/contrib/gcc/config/mips/
HDsr71k.md48 ;; Floating point stores go to Ld/St and go to MOV in the floating point
51 ;; Floating point loads go to Ld/St and go to LOAD in the floating point
/NextBSD/contrib/llvm/include/llvm/CodeGen/
HDSelectionDAGNodes.h2245 const LoadSDNode *Ld = dyn_cast<LoadSDNode>(N);
2246 return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
2247 Ld->getAddressingMode() == ISD::UNINDEXED;
/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMISelLowering.cpp1978 } else if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(Arg)) { in MatchingStackOffset() local
1986 SDValue Ptr = Ld->getBasePtr(); in MatchingStackOffset()
3722 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(Op)) in bitcastf32Toi32() local
3724 Ld->getChain(), Ld->getBasePtr(), Ld->getPointerInfo(), in bitcastf32Toi32()
3725 Ld->isVolatile(), Ld->isNonTemporal(), in bitcastf32Toi32()
3726 Ld->isInvariant(), Ld->getAlignment()); in bitcastf32Toi32()
3741 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(Op)) { in expandf64Toi32() local
3742 SDValue Ptr = Ld->getBasePtr(); in expandf64Toi32()
3744 Ld->getChain(), Ptr, in expandf64Toi32()
3745 Ld->getPointerInfo(), in expandf64Toi32()
[all …]
HDARMISelDAGToDAG.cpp3091 SDNode *Ld = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops); in Select() local
3095 cast<MachineSDNode>(Ld)->setMemRefs(MemOp, MemOp + 1); in Select()
3098 SDValue OutChain = isThumb ? SDValue(Ld, 2) : SDValue(Ld, 1); in Select()
3102 Result = SDValue(Ld, 0); in Select()
3107 dl, MVT::i32, SDValue(Ld, 0), SubRegIdx); in Select()
3115 Result = SDValue(Ld, 1); in Select()
3120 dl, MVT::i32, SDValue(Ld, 0), SubRegIdx); in Select()
/NextBSD/contrib/llvm/tools/clang/lib/Analysis/
HDThreadSafetyCommon.cpp840 til::SExpr *Ld = new (Arena) til::Load(Lp); in enterCFG() local
841 til::SExpr *V = addStatement(Ld, nullptr, Pm); in enterCFG()
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonCommonGEP.cpp1036 if (LoadInst *Ld = dyn_cast<LoadInst>(R)) { in separateConstantChains() local
1038 if (&Ld->getOperandUse(PtrX) == U) in separateConstantChains()
/NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/
HDDAGCombiner.cpp11029 LoadSDNode *Ld = dyn_cast<LoadSDNode>(St->getValue()); in MergeConsecutiveStores() local
11030 if (!Ld) break; in MergeConsecutiveStores()
11033 if (!Ld->hasNUsesOfValue(1, 0)) in MergeConsecutiveStores()
11037 if (Ld->isVolatile() || Ld->isIndexed()) in MergeConsecutiveStores()
11041 if (Ld->getExtensionType() != ISD::NON_EXTLOAD) in MergeConsecutiveStores()
11045 if (Ld->getMemoryVT() != MemVT) in MergeConsecutiveStores()
11048 BaseIndexOffset LdPtr = BaseIndexOffset::match(Ld->getBasePtr()); in MergeConsecutiveStores()
11060 LoadNodes.push_back(MemOpLink(Ld, LdPtr.Offset, 0)); in MergeConsecutiveStores()
11176 LoadSDNode *Ld = cast<LoadSDNode>(LoadNodes[0].MemNode); in MergeConsecutiveStores() local
11177 DAG.ReplaceAllUsesOfValueWith(SDValue(Ld, 1), in MergeConsecutiveStores()
[all …]
HDSelectionDAG.cpp6725 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { in reachesChainWithoutSideEffects() local
6726 if (!Ld->isVolatile()) in reachesChainWithoutSideEffects()
6727 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); in reachesChainWithoutSideEffects()
/NextBSD/contrib/llvm/tools/clang/lib/CodeGen/
HDCGBuiltin.cpp2956 LoadInst *Ld = Builder.CreateLoad(Ops[0]); in EmitCommonNeonBuiltinExpr() local
2957 Ld->setAlignment(cast<ConstantInt>(Align)->getZExtValue()); in EmitCommonNeonBuiltinExpr()
2959 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); in EmitCommonNeonBuiltinExpr()
3818 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); in EmitARMBuiltinExpr() local
3824 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); in EmitARMBuiltinExpr()
3831 LoadInst *Ld = Builder.CreateLoad(Ops[0]); in EmitARMBuiltinExpr() local
3832 Ld->setAlignment(cast<ConstantInt>(Align)->getZExtValue()); in EmitARMBuiltinExpr()
3833 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); in EmitARMBuiltinExpr()
/NextBSD/contrib/llvm/tools/clang/include/clang/Basic/
HDBuiltins.def120 BUILTIN(__builtin_huge_vall, "Ld", "nc")
123 BUILTIN(__builtin_infl , "Ld" , "nc")
/NextBSD/contrib/groff/
HDChangeLog.117769 Remove .Ld from mdoc package; replace it with special handling of
772 * tmac/doc-common: Remove `Ld' register.
776 * tmac/doc-syms (Ld): Removed.
/NextBSD/contrib/llvm/lib/Target/PowerPC/
HDPPCISelLowering.cpp6466 SDValue Ld; in LowerINT_TO_FP() local
6492 Ld = DAG.getMemIntrinsicNode(Op.getOpcode() == ISD::UINT_TO_FP ? in LowerINT_TO_FP()
6497 spliceIntoChain(RLI.ResChain, Ld.getValue(1), DAG); in LowerINT_TO_FP()
6514 Ld = DAG.getLoad(MVT::f64, dl, Store, FIdx, in LowerINT_TO_FP()
6520 SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Ld); in LowerINT_TO_FP()
/NextBSD/contrib/binutils/ld/
HDldint.texinfo10 * Ld-Internals: (ldint). The GNU linker internals.
HDld.texinfo43 * Ld: (ld). The GNU linker.
/NextBSD/contrib/llvm/tools/llvm-objdump/
HDMachODump.cpp8426 MachO::linkedit_data_command Ld = in PrintLoadCommands() local
8428 PrintLinkEditDataCommand(Ld, Buf.size()); in PrintLoadCommands()
/NextBSD/contrib/binutils/gas/doc/
HDas.texinfo2729 * Ld Sections:: Linker Sections
2872 @node Ld Sections