Home
last modified time | relevance | path

Searched refs:PIPE0_LATENCY_CONTROL (Results 1 – 2 of 2) sorted by relevance

/NextBSD/sys/dev/drm2/radeon/
HDevergreend.h763 #define PIPE0_LATENCY_CONTROL 0x0bf4 macro
HDevergreen.c1137 WREG32(PIPE0_LATENCY_CONTROL + pipe_offset, in evergreen_program_watermarks()
1145 WREG32(PIPE0_LATENCY_CONTROL + pipe_offset, in evergreen_program_watermarks()