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Searched refs:R13 (Results 1 – 25 of 32) sorted by relevance

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/NextBSD/contrib/llvm/lib/Target/MSP430/
HDMSP430CallingConv.td19 // i16 are returned in registers R15, R14, R13, R12
20 CCIfType<[i16], CCAssignToReg<[R15, R14, R13, R12]>>
HDMSP430RegisterInfo.td62 def R13 : MSP430RegWithSubregs<13, "r13", [R13B]>;
77 (add R12, R13, R14, R15, R11, R10, R9, R8, R7, R6, R5,
HDMSP430RegisterInfo.cpp55 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15, in getCalleeSavedRegs()
61 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15, in getCalleeSavedRegs()
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86RegisterInfo.cpp654 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: in getX86SubSuperRegisterOrZero()
691 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: in getX86SubSuperRegisterOrZero()
727 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: in getX86SubSuperRegisterOrZero()
763 case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: in getX86SubSuperRegisterOrZero()
764 return X86::R13; in getX86SubSuperRegisterOrZero()
HDX86CallingConv.td398 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
759 def CSR_64 : CalleeSavedRegs<(add RBX, R12, R13, R14, R15, RBP)>;
764 def CSR_Win64 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15,
778 R11, R12, R13, R14, R15, RBP,
789 R13, R14, R15,
793 R12, R13, R14, R15,
HDX86RegisterInfo.td145 def R13 : X86Reg<"r13", 13, [R13D]>, DwarfRegNum<[13, -2, -2]>;
318 // R12, R13, R14, and R15 for X86-64) are callee-save registers.
321 // Allocate R12 and R13 last, as these require an extra byte when
350 RBX, R14, R15, R12, R13, RBP, RSP, RIP)>;
/NextBSD/contrib/file/magic/Magdir/
HDcad76 # AutoCAD DWG versions R13/R14 (www.autodesk.com)
80 # AutoCAD DWG versions R12/R13/R14 (www.autodesk.com)
/NextBSD/contrib/llvm/lib/Target/X86/Disassembler/
HDX86DisassemblerDecoder.h184 ENTRY(R13) \
202 ENTRY(R13) \
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonRegisterInfo.cpp61 Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14, in getCallerSavedRegs()
HDHexagonRegisterInfo.td97 def D6 : Rd<12, "r13:12", [R12, R13]>, DwarfRegNum<[44]>;
/NextBSD/contrib/llvm/lib/Target/X86/MCTargetDesc/
HDX86AsmBackend.cpp438 case X86::R13: in PushInstrSize()
617 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 in getCompactUnwindRegNum()
HDX86BaseInfo.h734 case X86::R12: case X86::R13: case X86::R14: case X86::R15: in isX86_64ExtendedReg()
/NextBSD/contrib/llvm/lib/Target/PowerPC/Disassembler/
HDPPCDisassembler.cpp167 PPC::R12, PPC::R13, PPC::R14, PPC::R15,
178 PPC::R12, PPC::R13, PPC::R14, PPC::R15,
/NextBSD/contrib/llvm/include/llvm/DebugInfo/PDB/
HDPDBTypes.h416 R13 = 341, enumerator
/NextBSD/sys/amd64/amd64/
HDbpf_jit_machdep.h53 #define R13 5 macro
/NextBSD/contrib/llvm/lib/DebugInfo/PDB/
HDPDBExtras.cpp140 CASE_OUTPUT_ENUM_CLASS_NAME(PDB_RegisterId, R13, OS) in operator <<()
/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMRegisterInfo.td235 // or SP (R13 or R15) are used. The ARM ISA refers to these operands
335 // Pseudo-registers representing even-odd pairs of GPRs from R1 to R13/SP.
/NextBSD/contrib/llvm/lib/Target/PowerPC/
HDPPCRegisterInfo.cpp201 Reserved.set(PPC::R13); // Small Data Area pointer register in getReservedRegs()
206 Reserved.set(PPC::R13); in getReservedRegs()
HDPPCCallingConv.td212 def CSR_Darwin32 : CalleeSavedRegs<(add R13, R14, R15, R16, R17, R18, R19, R20,
/NextBSD/contrib/llvm/lib/Target/X86/AsmParser/
HDX86Operand.h405 case X86::R13: return X86::R13D; in getGR32FromGR64()
/NextBSD/contrib/subversion/subversion/libsvn_subr/
HDwin32_crashrpt.c252 context->R12, context->R13, context->R14, context->R15); in write_process_info()
/NextBSD/contrib/llvm/lib/Target/SystemZ/
HDSystemZRegisterInfo.td89 /// Allocate the callee-saved R6-R13 backwards. That way they can be saved
/NextBSD/contrib/llvm/lib/Target/PowerPC/AsmParser/
HDPPCAsmParser.cpp40 PPC::R12, PPC::R13, PPC::R14, PPC::R15,
51 PPC::R12, PPC::R13, PPC::R14, PPC::R15,
/NextBSD/contrib/llvm/lib/Target/Hexagon/Disassembler/
HDHexagonDisassembler.cpp102 Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14,
/NextBSD/contrib/gdb/gdb/
HDwince.c231 context_offset (R13),

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