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Searched refs:RSI (Results 1 – 25 of 26) sorted by relevance

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/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDR600OptimizeVectorRegisters.cpp80 bool operator==(const RegSeqInfo &RSI) const { in operator ==()
81 return RSI.Instr == Instr; in operator ==()
95 bool tryMergeUsingCommonSlot(RegSeqInfo &RSI, RegSeqInfo &CompatibleRSI,
97 bool tryMergeUsingFreeSlot(RegSeqInfo &RSI, RegSeqInfo &CompatibleRSI,
103 void trackRSI(const RegSeqInfo &RSI);
179 RegSeqInfo *RSI, const RegSeqInfo *BaseRSI, in RebuildVector() argument
181 unsigned Reg = RSI->Instr->getOperand(0).getReg(); in RebuildVector()
182 MachineBasicBlock::iterator Pos = RSI->Instr; in RebuildVector()
189 for (DenseMap<unsigned, unsigned>::iterator It = RSI->RegToChan.begin(), in RebuildVector()
190 E = RSI->RegToChan.end(); It != E; ++It) { in RebuildVector()
[all …]
/NextBSD/sys/amd64/amd64/
HDbpf_jit_machdep.c256 MOVobd(RCX, RSI, EAX); in bpf_jit_compile()
275 MOVobw(RCX, RSI, AX); in bpf_jit_compile()
290 MOVobb(RCX, RSI, AL); in bpf_jit_compile()
323 MOVobd(RCX, RSI, EAX); in bpf_jit_compile()
347 MOVobw(RCX, RSI, AX); in bpf_jit_compile()
367 MOVobb(RCX, RSI, AL); in bpf_jit_compile()
384 MOVobb(RCX, RSI, DL); in bpf_jit_compile()
399 MOVobd(RSP, RSI, EAX); in bpf_jit_compile()
404 MOVobd(RSP, RSI, EDX); in bpf_jit_compile()
414 MOVomd(EAX, RSP, RSI); in bpf_jit_compile()
[all …]
HDbpf_jit_machdep.h46 #define RSI 6 macro
/NextBSD/contrib/gcc/
HDbasic-block.h95 #define EXECUTE_IF_SET_IN_REG_SET(REGSET, MIN, REGNUM, RSI) \ argument
96 EXECUTE_IF_SET_IN_BITMAP (REGSET, MIN, REGNUM, RSI)
101 #define EXECUTE_IF_AND_COMPL_IN_REG_SET(REGSET1, REGSET2, MIN, REGNUM, RSI) \ argument
102 EXECUTE_IF_AND_COMPL_IN_BITMAP (REGSET1, REGSET2, MIN, REGNUM, RSI)
107 #define EXECUTE_IF_AND_IN_REG_SET(REGSET1, REGSET2, MIN, REGNUM, RSI) \ argument
108 EXECUTE_IF_AND_IN_BITMAP (REGSET1, REGSET2, MIN, REGNUM, RSI) \
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86RegisterInfo.cpp608 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegisterOrZero()
636 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegisterOrZero()
673 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegisterOrZero()
709 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegisterOrZero()
745 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegisterOrZero()
746 return X86::RSI; in getX86SubSuperRegisterOrZero()
HDX86CallingConv.td264 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
398 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
411 CCIfType<[i64], CCAssignToReg<[R15, RBP, RSI, RDX, RCX, R8]>>,
687 CCIfType<[i64], CCIfSubtarget<"is64Bit()", CCAssignToReg<[RDI, RSI, RDX, RCX]>>>,
764 def CSR_Win64 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15,
768 def CSR_64_RT_MostRegs : CalleeSavedRegs<(add CSR_64, RAX, RCX, RDX, RSI, RDI,
777 def CSR_64_MostRegs : CalleeSavedRegs<(add RBX, RCX, RDX, RSI, RDI, R8, R9, R10,
788 def CSR_Win64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12,
792 def CSR_Win64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI,
804 def CSR_64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RDI, RSI, R14, R15,
HDX86SelectionDAGInfo.cpp229 const unsigned ClobberSet[] = {X86::RCX, X86::RSI, X86::RDI, in EmitTargetCodeForMemcpy()
260 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI : in EmitTargetCodeForMemcpy()
HDX86InstrSystem.td523 let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
531 let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in {
535 let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
HDX86RegisterInfo.td133 def RSI : X86Reg<"rsi", 6, [ESI]>, DwarfRegNum<[4, -2, -2]>;
349 (add RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
375 def GR64_TC : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RSI, RDI,
396 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)>;
HDX86InstrCompiler.td356 let Defs = [RCX,RDI,RSI], Uses = [RCX,RDI,RSI], isCodeGenOnly = 1 in {
435 let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
HDX86FrameLowering.cpp163 X86::RAX, X86::RDX, X86::RCX, X86::RSI, X86::RDI, in findDeadCallerSavedReg()
HDX86FastISel.cpp2766 X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8 , X86::R9 in fastLowerArguments()
/NextBSD/contrib/llvm/utils/TableGen/
HDCodeGenSchedule.cpp1031 RSI = PTI->ReadSequences.begin(), RSE = PTI->ReadSequences.end(); in hasVariant() local
1032 RSI != RSE; ++RSI) { in hasVariant()
1034 RI = RSI->begin(), RE = RSI->end(); RI != RE; ++RI) { in hasVariant()
1268 RSI = Trans.ReadSequences.begin(), RSE = Trans.ReadSequences.end(); in substituteVariants() local
1269 RSI != RSE; ++RSI) { in substituteVariants()
1275 substituteVariantOperand(*RSI, /*IsRead=*/true, StartIdx); in substituteVariants()
1297 RSI = I->ReadSequences.begin(), RSE = I->ReadSequences.end(); in inferFromTransitions() local
1298 RSI != RSE; ++RSI) { in inferFromTransitions()
1301 SchedModels.findOrInsertRW(*RSI, /*IsRead=*/true)); in inferFromTransitions()
/NextBSD/contrib/llvm/lib/Target/X86/Disassembler/
HDX86DisassemblerDecoder.h177 ENTRY(RSI) \
195 ENTRY(RSI) \
HDX86Disassembler.cpp243 baseRegNo = insn.prefixPresent[0x67] ? X86::ESI : X86::RSI; in translateSrcIndex()
/NextBSD/contrib/llvm/lib/Target/X86/AsmParser/
HDX86Operand.h292 (getMemBaseReg() == X86::RSI || getMemBaseReg() == X86::ESI || in isSrcIdx()
398 case X86::RSI: return X86::ESI; in getGR32FromGR64()
HDX86AsmInstrumentation.cpp169 X86::RSI }; in ChooseFrameReg()
1024 InstrumentMOVSBase(X86::RDI /* DstReg */, X86::RSI /* SrcReg */, in InstrumentMOVSImpl()
HDX86AsmParser.cpp1004 is64BitMode() ? X86::RSI : (is32BitMode() ? X86::ESI : X86::SI); in DefaultMemSIOperand()
/NextBSD/contrib/llvm/include/llvm/DebugInfo/PDB/
HDPDBTypes.h407 RSI = 332, enumerator
/NextBSD/contrib/llvm/tools/clang/lib/Sema/
HDSemaStmt.cpp3862 CapturedRegionScopeInfo *RSI = getCurCapturedRegion(); in ActOnCapturedRegionError() local
3863 RecordDecl *Record = RSI->TheRecordDecl; in ActOnCapturedRegionError()
3875 CapturedRegionScopeInfo *RSI = getCurCapturedRegion(); in ActOnCapturedRegionEnd() local
3879 buildCapturedStmtCaptureList(Captures, CaptureInits, RSI->Captures); in ActOnCapturedRegionEnd()
3881 CapturedDecl *CD = RSI->TheCapturedDecl; in ActOnCapturedRegionEnd()
3882 RecordDecl *RD = RSI->TheRecordDecl; in ActOnCapturedRegionEnd()
3885 RSI->CapRegionKind, Captures, in ActOnCapturedRegionEnd()
HDSemaExpr.cpp12599 static bool captureInCapturedRegion(CapturedRegionScopeInfo *RSI, in captureInCapturedRegion() argument
12619 RecordDecl *RD = RSI->TheRecordDecl; in captureInCapturedRegion()
12637 RSI->addCapture(Var, /*isBlock*/false, ByRef, RefersToCapturedVariable, Loc, in captureInCapturedRegion()
12840 if (auto *RSI = dyn_cast<CapturedRegionScopeInfo>(CSI)) { in tryCaptureVariable() local
12843 if (RSI->CapRegionKind == CR_OpenMP) { in tryCaptureVariable()
13043 } else if (CapturedRegionScopeInfo *RSI = dyn_cast<CapturedRegionScopeInfo>(CSI)) { in tryCaptureVariable() local
13044 if (!captureInCapturedRegion(RSI, Var, ExprLoc, in tryCaptureVariable()
HDSemaExprCXX.cpp952 else if (CapturedRegionScopeInfo *RSI in CheckCXXThisCapture() local
954 ThisExpr = captureThis(Context, RSI->TheRecordDecl, ThisTy, Loc); in CheckCXXThisCapture()
/NextBSD/contrib/llvm/lib/DebugInfo/PDB/
HDPDBExtras.cpp131 CASE_OUTPUT_ENUM_CLASS_NAME(PDB_RegisterId, RSI, OS) in operator <<()
/NextBSD/contrib/llvm/lib/Target/X86/MCTargetDesc/
HDX86MCCodeEmitter.cpp1242 (siReg == X86::RSI && MI.getOperand(0).getReg() == X86::RDI)) && in encodeInstruction()
/NextBSD/contrib/gcc/config/s390/
HDs390.md152 "NN,E,RR,RRE,RX,RS,RSI,RI,SI,S,SS,SSE,RXE,RSE,RIL,RIE,RXY,RSY,SIY"
182 (eq_attr "op_type" "RX,RI,RRE,RS,RSI,S,SI") (const_int 4)]

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