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Searched refs:SEECTL (Results 1 – 6 of 6) sorted by relevance

/NextBSD/sys/dev/aic7xxx/
HDaic7xxx_pci.c1353 sd.sd_control_offset = SEECTL; in check_extport()
1354 sd.sd_status_offset = SEECTL; in check_extport()
1355 sd.sd_dataout_offset = SEECTL; in check_extport()
2140 sd.sd_control_offset = SEECTL; in ahc_pci_resume()
2141 sd.sd_status_offset = SEECTL; in ahc_pci_resume()
2142 sd.sd_dataout_offset = SEECTL; in ahc_pci_resume()
HDaic7xxx.reg523 * the SEECTL register is connected to the chip select. The SEECK,
525 * lines respectively. The SEERDY bit of SEECTL is useful in that it
526 * gives us an 800 nsec timer. After a write to the SEECTL register,
535 register SEECTL {
HDaic7xxx_reg.h1272 #define SEECTL 0x1e macro
HDaic79xx.c9620 ahd_outb(ahd, SEECTL, SEEOP_READ | SEESTART); in ahd_read_seeprom()
9661 ahd_outb(ahd, SEECTL, SEEOP_EWEN | SEESTART); in ahd_write_seeprom()
9675 ahd_outb(ahd, SEECTL, SEEOP_WRITE | SEESTART); in ahd_write_seeprom()
9686 ahd_outb(ahd, SEECTL, SEEOP_EWDS | SEESTART); in ahd_write_seeprom()
HDaic79xx_reg.h3395 #define SEECTL 0xbe macro
HDaic79xx.reg2938 register SEECTL {