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Searched refs:SFmode (Results 1 – 25 of 51) sorted by relevance

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/NextBSD/contrib/gcc/config/
HDgofast.h35 set_optab_libfunc (add_optab, SFmode, "fpadd"); in gofast_maybe_init_libfuncs()
37 set_optab_libfunc (sub_optab, SFmode, "fpsub"); in gofast_maybe_init_libfuncs()
39 set_optab_libfunc (smul_optab, SFmode, "fpmul"); in gofast_maybe_init_libfuncs()
41 set_optab_libfunc (sdiv_optab, SFmode, "fpdiv"); in gofast_maybe_init_libfuncs()
43 set_optab_libfunc (cmp_optab, SFmode, "fpcmp"); in gofast_maybe_init_libfuncs()
56 set_optab_libfunc (eq_optab, SFmode, "fpcmp"); in gofast_maybe_init_libfuncs()
57 set_optab_libfunc (ne_optab, SFmode, "fpcmp"); in gofast_maybe_init_libfuncs()
58 set_optab_libfunc (gt_optab, SFmode, 0); in gofast_maybe_init_libfuncs()
59 set_optab_libfunc (ge_optab, SFmode, 0); in gofast_maybe_init_libfuncs()
60 set_optab_libfunc (lt_optab, SFmode, "fpcmp"); in gofast_maybe_init_libfuncs()
[all …]
/NextBSD/contrib/gcc/config/ia64/
HDvect.md920 rtvec v = gen_rtvec (2, CONST1_RTX (SFmode), CONST1_RTX (SFmode));
965 rtvec v = gen_rtvec (2, CONST1_RTX (SFmode), CONST1_RTX (SFmode));
1153 if (!fr_reg_or_fp01_operand (op1, SFmode))
1154 op1 = force_reg (SFmode, op1);
1155 if (!fr_reg_or_fp01_operand (op2, SFmode))
1156 op2 = force_reg (SFmode, op2);
1225 emit_insn (gen_fpack (tmp, operands[1], CONST0_RTX (SFmode)));
1254 operands[1] = adjust_address (operands[1], SFmode, 0);
1256 operands[1] = gen_rtx_REG (SFmode, REGNO (operands[1]));
1272 operands[1] = gen_rtx_REG (SFmode, REGNO (operands[1]));
HDia64.c4109 else if (BYTES_BIG_ENDIAN && mode == SFmode) in ia64_function_arg()
4124 (BYTES_BIG_ENDIAN && mode == SFmode) ? DImode : mode; in ia64_function_arg()
6666 case SFmode: return 5; in ia64_mode_to_int()
9227 set_conv_libfunc (sext_optab, TFmode, SFmode, "_U_Qfcnvff_sgl_to_quad"); in ia64_init_libfuncs()
9230 set_conv_libfunc (trunc_optab, SFmode, TFmode, "_U_Qfcnvff_quad_to_sgl"); in ia64_init_libfuncs()
9570 case SFmode: in ia64_scalar_mode_supported_p()
/NextBSD/contrib/gcc/config/i386/
HDi386.h735 (((MODE) == SFmode && (!TARGET_SSE || !TARGET_SSE_MATH)) \
920 || (MODE) == SFmode || (MODE) == TFmode)
923 ((MODE) == V2SFmode || (MODE) == SFmode)
934 ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \
1251 ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode))
HDi386.c3503 case SFmode: in classify_argument()
3751 gen_rtx_REG (SFmode, in construct_container()
3857 case SFmode: in function_arg_advance()
3986 case SFmode: in function_arg()
4331 case SFmode: in ix86_libcall_value()
4383 && (mode == SFmode || mode == DFmode)) in ix86_value_regno()
4386 if ((sse_level >= 1 && mode == SFmode) in ix86_value_regno()
8104 if (GET_MODE (x) == SFmode) in print_operand()
8202 case SFmode: putc ('l', file); break; in print_operand()
8329 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode) in print_operand()
[all …]
HDmmx.md501 op1 = gen_rtx_REG (SFmode, REGNO (op1));
503 op1 = gen_lowpart (SFmode, op1);
529 operands[1] = adjust_address (operands[1], SFmode, 4);
HDi386.md2248 "ix86_expand_move (SFmode, operands); DONE;")
2311 || memory_operand (operands[0], SFmode))"
2893 || GET_MODE (operands[0]) == SFmode || GET_MODE (operands[0]) == DFmode)
3557 (FLOAT_EXTEND, DFmode, operands[1], SFmode);
3561 operands[1] = validize_mem (force_const_mem (SFmode, operands[1]));
3564 operands[1] = force_reg (SFmode, operands[1]);
3639 (FLOAT_EXTEND, XFmode, operands[1], SFmode);
3643 operands[1] = validize_mem (force_const_mem (SFmode, operands[1]));
3646 operands[1] = force_reg (SFmode, operands[1]);
3729 ;; Conversion from DFmode to SFmode.
[all …]
/NextBSD/contrib/gcc/config/mips/
HDmips.c2679 if (mode == SFmode) in mips_rtx_costs()
2697 if (mode == SFmode) in mips_rtx_costs()
3487 src = adjust_address (src, SFmode, 0); in mips_emit_fcc_reload()
3489 src = gen_rtx_REG (SFmode, true_regnum (src)); in mips_emit_fcc_reload()
3491 fp1 = gen_rtx_REG (SFmode, REGNO (scratch)); in mips_emit_fcc_reload()
3492 fp2 = gen_rtx_REG (SFmode, REGNO (scratch) + FP_INC); in mips_emit_fcc_reload()
3495 emit_move_insn (copy_rtx (fp2), CONST0_RTX (SFmode)); in mips_emit_fcc_reload()
3831 cum->fp_code += (mode == SFmode ? 1 : 2) << ((cum->arg_number - 1) * 2); in function_arg_advance()
4112 mode = TARGET_SINGLE_FLOAT ? SFmode : DFmode; in mips_setup_incoming_varargs()
6594 fpr_mode = (TARGET_SINGLE_FLOAT ? SFmode : DFmode); in mips_for_each_saved_reg()
[all …]
HDmips-ps-3d.md131 rtx op0 = force_reg (SFmode, XVECEXP (operands[1], 0, 0));
132 rtx op1 = force_reg (SFmode, XVECEXP (operands[1], 0, 1));
HDmips.md2797 rtx reg1 = gen_reg_rtx (SFmode);
2798 rtx reg2 = gen_reg_rtx (SFmode);
2806 emit_move_insn (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, SFmode));
2818 emit_move_insn (reg2, gen_rtx_MINUS (SFmode, operands[1], reg1));
2839 rtx reg1 = gen_reg_rtx (SFmode);
2840 rtx reg2 = gen_reg_rtx (SFmode);
2848 emit_move_insn (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, SFmode));
2860 emit_move_insn (reg2, gen_rtx_MINUS (SFmode, operands[1], reg1));
3754 if (mips_legitimize_move (SFmode, operands[0], operands[1]))
3762 && (register_operand (operands[0], SFmode)
[all …]
/NextBSD/contrib/gcc/config/s390/
HDs390.h370 (((MODE1) == SFmode || (MODE1) == DFmode) \
371 == ((MODE2) == SFmode || (MODE2) == DFmode))
HDs390.c2140 if ((GET_MODE (x) == DFmode || GET_MODE (x) == SFmode) in s390_rtx_costs()
2204 case SFmode: in s390_rtx_costs()
2247 else if (GET_MODE (x) == SFmode) in s390_rtx_costs()
2271 if (GET_MODE (x) == SFmode) in s390_rtx_costs()
5284 SFmode, SImode, SDmode, enumerator
7622 return mode == SFmode || mode == DFmode || mode == SDmode || mode == DDmode; in s390_function_arg_float()
/NextBSD/contrib/gcc/
HDreg-stack.c1101 dest = FP_MODE_REG (REGNO (dest), SFmode); in move_nan_for_stack_reg()
1386 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); in subst_stack_regs_pat()
2589 FP_MODE_REG (FIRST_STACK_REG, SFmode), in convert_regs_entry()
2915 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num); in convert_regs_1()
3142 not_a_num = CONST0_RTX (SFmode); in reg_to_stack()
3145 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); in reg_to_stack()
3146 not_a_num = force_const_mem (SFmode, not_a_num); in reg_to_stack()
/NextBSD/contrib/gcc/config/rs6000/
HDrs6000.c2107 if (mode == SFmode) in num_insns_constant()
4008 if (mode == SFmode && ! TARGET_POWERPC in rs6000_emit_move()
4101 case SFmode: in rs6000_emit_move()
4791 && (mode == SFmode || mode == DFmode in function_arg_advance()
5046 case SCmode: mode = SFmode; break; in rs6000_darwin64_record_arg_recurse()
5324 && (mode == SFmode || mode == DFmode in function_arg()
5982 && (TYPE_MODE (type) == SFmode in rs6000_gimplify_va_arg()
5991 if (TYPE_MODE (type) != SFmode) in rs6000_gimplify_va_arg()
9283 set_conv_libfunc (sext_optab, TFmode, SFmode, "__gcc_stoq"); in rs6000_init_libfuncs()
9285 set_conv_libfunc (trunc_optab, SFmode, TFmode, "__gcc_qtos"); in rs6000_init_libfuncs()
[all …]
HDconstraints.md104 == (mode == SFmode ? 1 : 2)")))
HDrs6000.md4908 ;; For the POWER architecture, we pretend that we have both SFmode and
5143 && HONOR_SIGNED_ZEROS (SFmode)"
5153 && ! HONOR_SIGNED_ZEROS (SFmode)"
5172 && ! HONOR_SIGNED_ZEROS (SFmode)"
5182 && HONOR_SIGNED_ZEROS (SFmode)"
5192 && ! HONOR_SIGNED_ZEROS (SFmode)"
5211 && ! HONOR_SIGNED_ZEROS (SFmode)"
5246 && !HONOR_NANS (SFmode) && !HONOR_SIGNED_ZEROS (SFmode)"
5248 operands[3] = gen_reg_rtx (SFmode);
5249 operands[4] = gen_reg_rtx (SFmode);
[all …]
HDpredicates.md242 case SFmode:
244 if (op == CONST0_RTX (SFmode))
/NextBSD/contrib/gcc/config/arm/
HDarm.c774 set_optab_libfunc (add_optab, SFmode, "__aeabi_fadd"); in arm_init_libfuncs()
775 set_optab_libfunc (sdiv_optab, SFmode, "__aeabi_fdiv"); in arm_init_libfuncs()
776 set_optab_libfunc (smul_optab, SFmode, "__aeabi_fmul"); in arm_init_libfuncs()
777 set_optab_libfunc (neg_optab, SFmode, "__aeabi_fneg"); in arm_init_libfuncs()
778 set_optab_libfunc (sub_optab, SFmode, "__aeabi_fsub"); in arm_init_libfuncs()
781 set_optab_libfunc (eq_optab, SFmode, "__aeabi_fcmpeq"); in arm_init_libfuncs()
782 set_optab_libfunc (ne_optab, SFmode, NULL); in arm_init_libfuncs()
783 set_optab_libfunc (lt_optab, SFmode, "__aeabi_fcmplt"); in arm_init_libfuncs()
784 set_optab_libfunc (le_optab, SFmode, "__aeabi_fcmple"); in arm_init_libfuncs()
785 set_optab_libfunc (ge_optab, SFmode, "__aeabi_fcmpge"); in arm_init_libfuncs()
[all …]
HDvfp.md183 ;; SFmode moves
191 && ( s_register_operand (operands[0], SFmode)
192 || s_register_operand (operands[1], SFmode))"
HDarm.md199 ; fdivs SFmode floating point division
816 && !cirrus_fp_register (operands[2], SFmode))
817 operands[2] = force_reg (SFmode, operands[2]);
1040 if (!cirrus_fp_register (operands[1], SFmode))
1041 operands[1] = force_reg (SFmode, operands[1]);
1042 if (!cirrus_fp_register (operands[2], SFmode))
1043 operands[2] = force_reg (SFmode, operands[2]);
1344 && !cirrus_fp_register (operands[2], SFmode))
1345 operands[2] = force_reg (SFmode, operands[2]);
3223 if (!cirrus_fp_register (operands[1], SFmode))
[all …]
HDcirrus.md412 || register_operand (operands[1], SFmode))"
/NextBSD/contrib/gcc/config/sparc/
HDsparc.md78 ;; The upper 32 fp regs on the v9 can't hold SFmode values. To deal with this
2334 "<V32:MODE>mode == SFmode || TARGET_VIS"
2392 && (register_operand (operands[0], SFmode)
2393 || register_or_zero_operand (operands[1], SFmode))"
2426 ;; The following 3 patterns build SFmode constants in integer registers.
2668 half_mode = SFmode;
2707 half_mode = SFmode;
2742 half_mode = SFmode;
2769 half_mode = SFmode;
2799 half_mode = SFmode;
[all …]
HDsparc.c1014 && (mode == SFmode in sparc_expand_move()
2284 case SFmode: in emit_soft_tfmode_cvt()
2298 case SFmode: in emit_soft_tfmode_cvt()
2515 else if (! TARGET_FPU && register_operand (src, SFmode)) in eligible_for_restore_insn()
3807 mode = i < 32 ? SImode : SFmode; in save_or_restore_regs()
3812 mode = i < 32 ? SImode : SFmode; in save_or_restore_regs()
7811 set_conv_libfunc (sext_optab, TFmode, SFmode, "_Q_stoq"); in sparc_init_libfuncs()
7813 set_conv_libfunc (trunc_optab, SFmode, TFmode, "_Q_qtos"); in sparc_init_libfuncs()
7831 set_conv_libfunc (sfix_optab, DImode, SFmode, "__ftoll"); in sparc_init_libfuncs()
7832 set_conv_libfunc (ufix_optab, DImode, SFmode, "__ftoull"); in sparc_init_libfuncs()
[all …]
HDsparc.h914 || (MODE1 != SFmode && MODE2 != SFmode)))))
HDpredicates.md83 gcc_assert (mode == SFmode);

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