Searched refs:ShOp (Results 1 – 7 of 7) sorted by relevance
| /NextBSD/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| HD | ARMAddressingModes.h | 112 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc() argument 113 return ShOp | (Imm << 3); in getSORegOpc()
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| HD | ARMMCCodeEmitter.cpp | 1084 ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(MO2.getImm()); in getLdStSORegOpValue() local 1085 unsigned SBits = getShiftOp(ShOp); in getLdStSORegOpValue() 1137 ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(Imm); in getAddrMode2OffsetOpValue() local 1139 Binary |= getShiftOp(ShOp) << 5; // Shift type is bits [6:5] in getAddrMode2OffsetOpValue()
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| /NextBSD/contrib/llvm/lib/Target/AArch64/AsmParser/ |
| HD | AArch64AsmParser.cpp | 1707 CreateShiftExtend(AArch64_AM::ShiftExtendType ShOp, unsigned Val, in CreateShiftExtend() argument 1710 Op->ShiftExtend.Type = ShOp; in CreateShiftExtend() 2305 AArch64_AM::ShiftExtendType ShOp = in tryParseOptionalShiftExtend() local 2322 if (ShOp == AArch64_AM::InvalidShiftExtend) in tryParseOptionalShiftExtend() 2330 if (ShOp == AArch64_AM::LSL || ShOp == AArch64_AM::LSR || in tryParseOptionalShiftExtend() 2331 ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR || in tryParseOptionalShiftExtend() 2332 ShOp == AArch64_AM::MSL) { in tryParseOptionalShiftExtend() 2341 AArch64Operand::CreateShiftExtend(ShOp, 0, false, S, E, getContext())); in tryParseOptionalShiftExtend() 2368 ShOp, MCE->getValue(), true, S, E, getContext())); in tryParseOptionalShiftExtend()
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMInstrNEON.td | 2577 ValueType Ty, SDNode ShOp> 2582 (Ty (ShOp (Ty DPR:$Vn), 2589 string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> 2594 (Ty (ShOp (Ty DPR:$Vn), 2625 ValueType ResTy, ValueType OpTy, SDNode ShOp> 2630 (ResTy (ShOp (ResTy QPR:$Vn), 2638 ValueType ResTy, ValueType OpTy, SDNode ShOp> 2643 (ResTy (ShOp (ResTy QPR:$Vn), 2785 ValueType Ty, SDPatternOperator MulOp, SDPatternOperator ShOp> 2792 (Ty (ShOp (Ty DPR:$src1), [all …]
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| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | LegalizeVectorTypes.cpp | 2266 SDValue ShOp = N->getOperand(1); in WidenVecRes_POWI() local 2267 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp); in WidenVecRes_POWI() 2273 SDValue ShOp = N->getOperand(1); in WidenVecRes_Shift() local 2275 EVT ShVT = ShOp.getValueType(); in WidenVecRes_Shift() 2277 ShOp = GetWidenedVector(ShOp); in WidenVecRes_Shift() 2278 ShVT = ShOp.getValueType(); in WidenVecRes_Shift() 2284 ShOp = ModifyToType(ShOp, ShWidenVT); in WidenVecRes_Shift() 2286 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp); in WidenVecRes_Shift()
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| HD | DAGCombiner.cpp | 2735 SDValue ShOp = N0->getOperand(1); in SimplifyBinOpWithSameOpcodeHands() local 2739 if (N->getOpcode() == ISD::XOR && ShOp.getOpcode() != ISD::UNDEF) { in SimplifyBinOpWithSameOpcodeHands() 2741 ShOp = DAG.getConstant(0, SDLoc(N), VT); in SimplifyBinOpWithSameOpcodeHands() 2743 ShOp = SDValue(); in SimplifyBinOpWithSameOpcodeHands() 2749 if (N0.getOperand(1) == N1.getOperand(1) && ShOp.getNode()) { in SimplifyBinOpWithSameOpcodeHands() 2753 return DAG.getVectorShuffle(VT, SDLoc(N), NewNode, ShOp, in SimplifyBinOpWithSameOpcodeHands() 2759 ShOp = N0->getOperand(0); in SimplifyBinOpWithSameOpcodeHands() 2760 if (N->getOpcode() == ISD::XOR && ShOp.getOpcode() != ISD::UNDEF) { in SimplifyBinOpWithSameOpcodeHands() 2762 ShOp = DAG.getConstant(0, SDLoc(N), VT); in SimplifyBinOpWithSameOpcodeHands() 2764 ShOp = SDValue(); in SimplifyBinOpWithSameOpcodeHands() [all …]
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| /NextBSD/contrib/llvm/lib/Target/ARM/Disassembler/ |
| HD | ARMDisassembler.cpp | 1591 ARM_AM::ShiftOpc ShOp = ARM_AM::lsl; in DecodeSORegMemOperand() local 1594 ShOp = ARM_AM::lsl; in DecodeSORegMemOperand() 1597 ShOp = ARM_AM::lsr; in DecodeSORegMemOperand() 1600 ShOp = ARM_AM::asr; in DecodeSORegMemOperand() 1603 ShOp = ARM_AM::ror; in DecodeSORegMemOperand() 1607 if (ShOp == ARM_AM::ror && imm == 0) in DecodeSORegMemOperand() 1608 ShOp = ARM_AM::rrx; in DecodeSORegMemOperand() 1616 shift = ARM_AM::getAM2Opc(ARM_AM::add, imm, ShOp); in DecodeSORegMemOperand() 1618 shift = ARM_AM::getAM2Opc(ARM_AM::sub, imm, ShOp); in DecodeSORegMemOperand()
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