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Searched refs:Src0SubRC (Results 1 – 1 of 1) sorted by relevance

/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDSIInstrInfo.cpp2411 const TargetRegisterClass *Src0SubRC = RI.getSubRegClass(Src0RC, AMDGPU::sub0); in splitScalar64BitUnaryOp() local
2414 AMDGPU::sub0, Src0SubRC); in splitScalar64BitUnaryOp()
2424 AMDGPU::sub1, Src0SubRC); in splitScalar64BitUnaryOp()
2464 const TargetRegisterClass *Src0SubRC = RI.getSubRegClass(Src0RC, AMDGPU::sub0); in splitScalar64BitBinaryOp() local
2472 AMDGPU::sub0, Src0SubRC); in splitScalar64BitBinaryOp()
2485 AMDGPU::sub1, Src0SubRC); in splitScalar64BitBinaryOp()