Home
last modified time | relevance | path

Searched refs:TRANSA_DPLLB_SEL (Results 1 – 2 of 2) sorted by relevance

/NextBSD/sys/dev/drm2/i915/
HDi915_reg.h3712 #define TRANSA_DPLLB_SEL (1<<0) macro
HDintel_display.c2843 sel = TRANSA_DPLLB_SEL; in ironlake_pch_enable()
3129 temp &= ~(TRANSA_DPLL_ENABLE | TRANSA_DPLLB_SEL); in ironlake_crtc_disable()