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Searched refs:X7 (Results 1 – 15 of 15) sorted by relevance

/NextBSD/contrib/libstdc++/include/ext/
Dtypelist.h320 …AIN8(X0, X1, X2, X3, X4, X5, X6, X7) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN7(X1, X…
321 …N9(X0, X1, X2, X3, X4, X5, X6, X7, X8) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN8(X1,…
322 …(X0, X1, X2, X3, X4, X5, X6, X7, X8, X9) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN9(X…
323 …, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN1…
324 …X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHA…
325 … X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_C…
326 …2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIS…
327 …X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPEL…
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64CallingConvention.td54 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
55 // i128 is split to two i64s, we can't fit half to register X7.
60 CCIfType<[i64], CCIfSplit<CCAssignToStackWithShadow<8, 16, [X7]>>>,
62 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
97 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
98 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
135 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
136 // i128 is split to two i64s, we can't fit half to register X7.
141 CCIfType<[i64], CCIfSplit<CCAssignToStackWithShadow<8, 16, [X7]>>>,
143 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
[all …]
HDAArch64CallingConvention.h30 AArch64::X6, AArch64::X7};
HDAArch64RegisterInfo.td97 def X7 : AArch64Reg<7, "x7", [W7]>, DwarfRegAlias<W7>;
HDAArch64FastISel.cpp2888 AArch64::X5, AArch64::X6, AArch64::X7 }, in fastLowerArguments()
HDAArch64ISelLowering.cpp2278 AArch64::X6, AArch64::X7 }; in saveVarArgRegisters()
/NextBSD/contrib/llvm/lib/LibDriver/
HDLibDriver.cpp43 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X6, X7, X8, X9, X10) \ argument
45 X1, X2, X9, X10, OPT_##ID, llvm::opt::Option::KIND##Class, X8, X7, \
/NextBSD/contrib/llvm/lib/Target/AArch64/Utils/
HDAArch64BaseInfo.h39 case AArch64::X7: return AArch64::W7; in getWRegFromXReg()
79 case AArch64::W7: return AArch64::X7; in getXRegFromWReg()
/NextBSD/contrib/llvm/lib/Target/PowerPC/
HDPPCInstr64Bit.td934 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
943 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
966 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
975 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
HDPPCCallingConv.td97 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
HDPPCISelLowering.cpp3042 PPC::X7, PPC::X8, PPC::X9, PPC::X10, in LowerFormalArguments_64SVR4()
3467 PPC::X7, PPC::X8, PPC::X9, PPC::X10, in LowerFormalArguments_Darwin()
4764 PPC::X7, PPC::X8, PPC::X9, PPC::X10, in LowerCall_64SVR4()
5470 PPC::X7, PPC::X8, PPC::X9, PPC::X10, in LowerCall_Darwin()
/NextBSD/contrib/llvm/lib/Target/PowerPC/Disassembler/
HDPPCDisassembler.cpp187 PPC::X4, PPC::X5, PPC::X6, PPC::X7,
/NextBSD/contrib/llvm/lib/Target/PowerPC/AsmParser/
HDPPCAsmParser.cpp59 PPC::X4, PPC::X5, PPC::X6, PPC::X7,
70 PPC::X4, PPC::X5, PPC::X6, PPC::X7,
/NextBSD/contrib/llvm/lib/Target/AArch64/Disassembler/
HDAArch64Disassembler.cpp370 AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9,
/NextBSD/share/misc/
HDpci_vendors11759 5ace 7591 Behold TV X7
11760 5ace 7595 Behold TV X7