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Searched refs:dst2 (Results 1 – 18 of 18) sorted by relevance

/NextBSD/lib/libc/net/
HDname6.c944 const struct hp_order *dst1 = arg1, *dst2 = arg2; in comp_dst() local
951 dst2->aio_srcsa.sa_family == AF_UNSPEC) { in comp_dst()
955 dst2->aio_srcsa.sa_family != AF_UNSPEC) { in comp_dst()
961 dst2->aio_dstscope != dst2->aio_srcscope) { in comp_dst()
965 dst2->aio_dstscope == dst2->aio_srcscope) { in comp_dst()
971 dst2->aio_srcsa.sa_family != AF_UNSPEC) { in comp_dst()
973 (dst2->aio_srcflag & AIO_SRCFLAG_DEPRECATED)) { in comp_dst()
977 !(dst2->aio_srcflag & AIO_SRCFLAG_DEPRECATED)) { in comp_dst()
990 (dst2->aio_srcpolicy == NULL || dst2->aio_dstpolicy == NULL || in comp_dst()
991 dst2->aio_srcpolicy->pc_policy.label != in comp_dst()
[all …]
HDgetaddrinfo.c964 const struct ai_order *dst1 = arg1, *dst2 = arg2; in comp_dst() local
971 dst2->aio_srcsa.sa_family == AF_UNSPEC) { in comp_dst()
975 dst2->aio_srcsa.sa_family != AF_UNSPEC) { in comp_dst()
981 dst2->aio_dstscope != dst2->aio_srcscope) { in comp_dst()
985 dst2->aio_dstscope == dst2->aio_srcscope) { in comp_dst()
991 dst2->aio_srcsa.sa_family != AF_UNSPEC) { in comp_dst()
993 (dst2->aio_srcflag & AIO_SRCFLAG_DEPRECATED)) { in comp_dst()
997 !(dst2->aio_srcflag & AIO_SRCFLAG_DEPRECATED)) { in comp_dst()
1010 (dst2->aio_srcpolicy == NULL || dst2->aio_dstpolicy == NULL || in comp_dst()
1011 dst2->aio_srcpolicy->pc_policy.label != in comp_dst()
[all …]
/NextBSD/libexec/rbootd/
HDrmpproto.c291 char *src, *dst1, *dst2; in SendBootRepl() local
320 dst2 = &rpl->r_brpl.rmp_flnm; in SendBootRepl()
322 *dst1++ = *dst2++ = *src++; in SendBootRepl()
/NextBSD/sys/dev/ioat/
HDioat.h143 bus_addr_t dst1, bus_addr_t dst2, bus_addr_t src1, bus_addr_t src2,
HDioat_test.c308 bus_addr_t src2, dst2; in ioat_test_submit_1_tx() local
311 dst2 = vtophys((vm_offset_t)tx->buf[2*i+1] + PAGE_SIZE); in ioat_test_submit_1_tx()
313 desc = ioat_copy_8k_aligned(dma, dest, dst2, src, src2, in ioat_test_submit_1_tx()
HDioat.c920 bus_addr_t dst2, bus_addr_t src1, bus_addr_t src2, in ioat_copy_8k_aligned() argument
930 if (((src1 | src2 | dst1 | dst2) & (0xffffull << 48)) != 0) { in ioat_copy_8k_aligned()
935 if (((src1 | src2 | dst1 | dst2) & PAGE_MASK) != 0) { in ioat_copy_8k_aligned()
951 if (dst2 != dst1 + PAGE_SIZE) { in ioat_copy_8k_aligned()
953 hw_desc->next_dest_addr = dst2; in ioat_copy_8k_aligned()
/NextBSD/contrib/llvm/lib/Target/NVPTX/
HDNVPTXInstrInfo.td1778 NVPTXInst<(outs regclass:$dst, regclass:$dst2), (ins i32imm:$b),
1780 "\t{{$dst, $dst2}}, [retval0+$b];"), []>;
1783 NVPTXInst<(outs regclass:$dst, regclass:$dst2, regclass:$dst3,
1787 "\t{{$dst, $dst2, $dst3, $dst4}}, [retval0+$b];"), []>;
2155 def _v2_avar : NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
2159 "$fromWidth \t{{$dst1, $dst2}}, [$addr];"), []>;
2160 def _v2_areg : NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
2164 "$fromWidth \t{{$dst1, $dst2}}, [$addr];"), []>;
2165 def _v2_areg_64 : NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
2169 "$fromWidth \t{{$dst1, $dst2}}, [$addr];"), []>;
[all …]
HDNVPTXIntrinsics.td1414 def _areg32: NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
1417 def _areg64: NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
1420 def _ari32: NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
1423 def _ari64: NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
1426 def _avar: NVPTXInst<(outs regclass:$dst1, regclass:$dst2),
1432 def _areg32: NVPTXInst<(outs regclass:$dst1, regclass:$dst2, regclass:$dst3,
1435 def _areg64: NVPTXInst<(outs regclass:$dst1, regclass:$dst2, regclass:$dst3,
1438 def _ari32: NVPTXInst<(outs regclass:$dst1, regclass:$dst2, regclass:$dst3,
1441 def _ari64: NVPTXInst<(outs regclass:$dst1, regclass:$dst2, regclass:$dst3,
1444 def _avar: NVPTXInst<(outs regclass:$dst1, regclass:$dst2, regclass:$dst3,
[all …]
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonInstrInfoV3.td250 (ins DoubleRegs:$dst2, DoubleRegs:$src1, IntRegs:$src2),
252 "$dst2 = $dst">;
HDHexagonInstrInfoV5.td697 (ins IntRegs:$dst2, IntRegs:$Rs, IntRegs:$Rt),
699 [], "$dst2 = $Rx" , M_tc_3_SLOT23 > ,
729 (ins IntRegs:$dst2, IntRegs:$Rs, IntRegs:$Rt, PredRegs:$Pu),
731 [], "$dst2 = $Rx" , M_tc_3_SLOT23 > ,
HDHexagonInstrInfo.td1817 : LDInstPI <(outs RC:$dst, IntRegs:$dst2),
1821 "$src1 = $dst2" > ,
1851 : LDInst <(outs RC:$dst, IntRegs:$dst2),
1856 "$src2 = $dst2" > ,
1943 : LDInstPI <(outs DoubleRegs:$dst, IntRegs:$dst2),
1946 [], "$src2 = $dst2, $src1 = $dst" > ,
2422 : MInst_acc<(outs IntRegs:$Rx), (ins IntRegs:$dst2, IntRegs:$Rs, IntRegs:$Rt),
2428 [], "$dst2 = $Rx", M_tc_3x_SLOT23 > {
2514 (ins DoubleRegs:$dst2, IntRegs:$Rs, IntRegs:$Rt),
2519 [], "$dst2 = $Rxx", M_tc_3x_SLOT23 > {
[all …]
HDHexagonInstrInfoV4.td397 LDInst<(outs RC:$dst1, IntRegs:$dst2),
399 "$dst1 = "#mnemonic#"($dst2 = #$addr)",
403 bits<5> dst2;
411 let Inst{20-16} = dst2;
2005 (ins DoubleRegs:$dst2, DoubleRegs:$Rss, DoubleRegs:$Rtt),
2008 (xor (i64 DoubleRegs:$dst2), (xor (i64 DoubleRegs:$Rss),
2010 "$dst2 = $Rxx", S_3op_tc_1_SLOT23> {
2053 (ins DoubleRegs:$dst2, DoubleRegs:$Rss, IntRegs:$Rt, u2Imm:$u2),
2055 "$dst2 = $Rxx", S_3op_tc_3x_SLOT23> {
2075 (ins DoubleRegs:$dst2, DoubleRegs:$Rss, IntRegs:$Rt),
[all …]
/NextBSD/sys/cam/scsi/
HDscsi_ch.c935 u_int16_t src, dst1, dst2; in chexchange() local
966 dst2 = softc->sc_firsts[ce->ce_sdsttype] + ce->ce_sdstunit; in chexchange()
977 /* dst2 */ dst2, in chexchange()
1782 u_int32_t dst1, u_int32_t dst2, int invert1, in scsi_exchange_medium() argument
1795 scsi_ulto2b(dst2, scsi_cmd->sdst); in scsi_exchange_medium()
HDscsi_ch.h480 u_int32_t dst1, u_int32_t dst2, int invert1,
/NextBSD/contrib/llvm/lib/Target/XCore/
HDXCoreInstrInfo.td519 def LADD_l5r : _FL5R<0b000001, (outs GRRegs:$dst1, GRRegs:$dst2),
521 "ladd $dst2, $dst1, $src1, $src2, $src3",
524 def LSUB_l5r : _FL5R<0b000010, (outs GRRegs:$dst1, GRRegs:$dst2),
526 "lsub $dst2, $dst1, $src1, $src2, $src3", []>;
528 def LDIVU_l5r : _FL5R<0b000000, (outs GRRegs:$dst1, GRRegs:$dst2),
530 "ldivu $dst1, $dst2, $src3, $src1, $src2", []>;
535 0b00000, (outs GRRegs:$dst1, GRRegs:$dst2),
537 "lmul $dst1, $dst2, $src1, $src2, $src3, $src4", []>;
/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMInstrNEON.td911 : NLdSt<0, 0b10, op11_8, op7_4, (outs DPR:$Vd, DPR:$dst2, DPR:$dst3),
913 "vld3", Dt, "\\{$Vd, $dst2, $dst3\\}, $Rn", "", []> {
930 (outs DPR:$Vd, DPR:$dst2, DPR:$dst3, GPR:$wb),
932 "vld3", Dt, "\\{$Vd, $dst2, $dst3\\}, $Rn$Rm",
970 (outs DPR:$Vd, DPR:$dst2, DPR:$dst3, DPR:$dst4),
972 "vld4", Dt, "\\{$Vd, $dst2, $dst3, $dst4\\}, $Rn", "", []> {
989 (outs DPR:$Vd, DPR:$dst2, DPR:$dst3, DPR:$dst4, GPR:$wb),
991 "vld4", Dt, "\\{$Vd, $dst2, $dst3, $dst4\\}, $Rn$Rm",
1140 : NLdStLn<1, 0b10, op11_8, op7_4, (outs DPR:$Vd, DPR:$dst2),
1142 IIC_VLD2ln, "vld2", Dt, "\\{$Vd[$lane], $dst2[$lane]\\}, $Rn",
[all …]
HDARMInstrVFP.td927 (outs SPR:$dst1, SPR:$dst2), (ins GPR:$src1, GPR:$src2),
928 IIC_fpMOVID, "vmov", "\t$dst1, $dst2, $src1, $src2",
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86InstrArithmetic.td1297 def rr : I<0xF6, MRMSrcReg, (outs RC:$dst1, RC:$dst2), (ins RC:$src),
1298 !strconcat(mnemonic, "\t{$src, $dst2, $dst1|$dst1, $dst2, $src}"),
1302 def rm : I<0xF6, MRMSrcMem, (outs RC:$dst1, RC:$dst2), (ins x86memop:$src),
1303 !strconcat(mnemonic, "\t{$src, $dst2, $dst1|$dst1, $dst2, $src}"),