Searched refs:fastEmit_ri_ (Results 1 – 3 of 3) sorted by relevance
| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | FastISel.cpp | 412 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
445 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
507 N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT); in selectGetElementPtr()
526 N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT); in selectGetElementPtr()
535 N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT); in selectGetElementPtr()
551 IdxN = fastEmit_ri_(VT, ISD::MUL, IdxN, IdxNIsKill, ElementSize, VT); in selectGetElementPtr()
562 N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT); in selectGetElementPtr()
1437 unsigned IntResultReg = fastEmit_ri_( in selectFNeg()
1674 unsigned FastISel::fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, in fastEmit_ri_() function in FastISel
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| /NextBSD/contrib/llvm/include/llvm/CodeGen/ |
| HD | FastISel.h | 373 unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMFastISel.cpp | 907 Addr.Base.Reg = fastEmit_ri_(MVT::i32, ISD::ADD, Addr.Base.Reg, in ARMSimplifyAddress()
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