Searched refs:getPreloadedValue (Results 1 – 6 of 6) sorted by relevance
| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | SIPrepareScratchRegs.cpp | 77 TRI->getPreloadedValue(MF, SIRegisterInfo::SCRATCH_PTR); in runOnMachineFunction() 79 TRI->getPreloadedValue(MF, SIRegisterInfo::SCRATCH_WAVE_OFFSET); in runOnMachineFunction()
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| HD | SIRegisterInfo.h | 110 unsigned getPreloadedValue(const MachineFunction &MF,
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| HD | SIISelLowering.cpp | 442 unsigned InputPtrReg = TRI->getPreloadedValue(MF, SIRegisterInfo::INPUT_PTR); in LowerParameter() 568 TRI->getPreloadedValue(MF, SIRegisterInfo::INPUT_PTR); in LowerFormalArguments() 575 TRI->getPreloadedValue(MF, SIRegisterInfo::SCRATCH_PTR); in LowerFormalArguments() 1026 TRI->getPreloadedValue(MF, SIRegisterInfo::TGID_X), VT); in LowerINTRINSIC_WO_CHAIN() 1029 TRI->getPreloadedValue(MF, SIRegisterInfo::TGID_Y), VT); in LowerINTRINSIC_WO_CHAIN() 1032 TRI->getPreloadedValue(MF, SIRegisterInfo::TGID_Z), VT); in LowerINTRINSIC_WO_CHAIN() 1035 TRI->getPreloadedValue(MF, SIRegisterInfo::TIDIG_X), VT); in LowerINTRINSIC_WO_CHAIN() 1038 TRI->getPreloadedValue(MF, SIRegisterInfo::TIDIG_Y), VT); in LowerINTRINSIC_WO_CHAIN() 1041 TRI->getPreloadedValue(MF, SIRegisterInfo::TIDIG_Z), VT); in LowerINTRINSIC_WO_CHAIN()
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| HD | SIRegisterInfo.cpp | 465 unsigned SIRegisterInfo::getPreloadedValue(const MachineFunction &MF, in getPreloadedValue() function in SIRegisterInfo
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| HD | SIInstrInfo.cpp | 604 unsigned TIDIGXReg = TRI->getPreloadedValue(*MF, SIRegisterInfo::TIDIG_X); in calculateLDSSpillAddress() 605 unsigned TIDIGYReg = TRI->getPreloadedValue(*MF, SIRegisterInfo::TIDIG_Y); in calculateLDSSpillAddress() 606 unsigned TIDIGZReg = TRI->getPreloadedValue(*MF, SIRegisterInfo::TIDIG_Z); in calculateLDSSpillAddress() 608 TRI->getPreloadedValue(*MF, SIRegisterInfo::INPUT_PTR); in calculateLDSSpillAddress()
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| HD | AMDGPUISelDAGToDAG.cpp | 1076 TRI->getPreloadedValue(MF, SIRegisterInfo::SCRATCH_WAVE_OFFSET); in SelectMUBUFScratch()
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