Searched refs:hasVGPRs (Results 1 – 5 of 5) sorted by relevance
125 if (TRI->hasVGPRs(MRI.getRegClass(MI.getOperand(i).getReg()))) in hasVGPROperands()201 return TRI->isSGPRClass(DstRC) && TRI->hasVGPRs(SrcRC); in isVGPRToSGPRCopy()287 if (TRI->hasVGPRs(MRI.getRegClass(Reg))) { in runOnMachineFunction()312 if (TRI->hasVGPRs(TII->getOpRegClass(MI, 0)) || in runOnMachineFunction()327 (TRI->hasVGPRs(Src0RC) || TRI->hasVGPRs(Src1RC))) { in runOnMachineFunction()
58 return !hasVGPRs(RC); in isSGPRClass()70 bool hasVGPRs(const TargetRegisterClass *RC) const;
81 return TRI.hasVGPRs(MRI.getRegClass(MO->getReg())); in isVGPR()83 return TRI.hasVGPRs(TRI.getPhysRegClass(MO->getReg())); in isVGPR()
362 bool SIRegisterInfo::hasVGPRs(const TargetRegisterClass *RC) const { in hasVGPRs() function in SIRegisterInfo373 if (hasVGPRs(SRC)) { in getEquivalentVGPRClass()
497 } else if(RI.hasVGPRs(RC) && ST.isVGPRSpillingEnabled(MFI)) { in storeRegToStackSlot()547 } else if(RI.hasVGPRs(RC) && ST.isVGPRSpillingEnabled(MFI)) { in loadRegFromStackSlot()1525 return RI.hasVGPRs(getOpRegClass(MI, 0)); in canReadVGPR()1527 return RI.hasVGPRs(getOpRegClass(MI, OpNo)); in canReadVGPR()1784 if (RI.hasVGPRs(OpRC)) { in legalizeOperands()2352 if (RI.hasVGPRs(NewDstRC)) in moveToVALU()