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Searched refs:insn_code (Results 1 – 25 of 30) sorted by relevance

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/NextBSD/contrib/gcc/
HDoptabs.h44 enum insn_code insn_code; member
431 extern enum insn_code reload_in_optab[NUM_MACHINE_MODES];
432 extern enum insn_code reload_out_optab[NUM_MACHINE_MODES];
449 extern enum insn_code setcc_gen_code[NUM_RTX_CODE];
455 extern enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
461 extern enum insn_code vcond_gen_code[NUM_MACHINE_MODES];
462 extern enum insn_code vcondu_gen_code[NUM_MACHINE_MODES];
465 extern enum insn_code movmem_optab[NUM_MACHINE_MODES];
468 extern enum insn_code setmem_optab[NUM_MACHINE_MODES];
472 extern enum insn_code cmpstr_optab[NUM_MACHINE_MODES];
[all …]
HDgenattrtab.c138 int insn_code; /* Instruction number. */ member
1272 get_attr_value (rtx value, struct attr_desc *attr, int insn_code) in get_attr_value() argument
1280 if (insn_code < 0 || insn_alternatives == NULL) in get_attr_value()
1283 num_alt = insn_alternatives[insn_code]; in get_attr_value()
1289 || insn_alternatives[av->first_insn->def->insn_code])) in get_attr_value()
1433 av = get_attr_value (value, attr, id->insn_code); in fill_attr()
1565 new_attr, ie->def->insn_code); in make_length_attrs()
1643 simplify_cond (rtx exp, int insn_code, int insn_index) in simplify_cond() argument
1662 new_defval = simplify_cond (defval, insn_code, insn_index); in simplify_cond()
1671 newtest = simplify_test_exp_in_temp (tests[i], insn_code, insn_index); in simplify_cond()
[all …]
HDoptabs.c77 enum insn_code setcc_gen_code[NUM_RTX_CODE];
85 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
91 enum insn_code vcond_gen_code[NUM_MACHINE_MODES];
92 enum insn_code vcondu_gen_code[NUM_MACHINE_MODES];
105 static enum insn_code can_fix_p (enum machine_mode, enum machine_mode, int,
107 static enum insn_code can_float_p (enum machine_mode, enum machine_mode, int);
127 static rtx vector_compare_rtx (tree, bool, enum insn_code);
385 icode = (int) widen_pattern_optab->handlers[(int) tmode0].insn_code; in expand_widen_pattern_expr()
510 int icode = (int) ternary_optab->handlers[(int) mode].insn_code; in expand_ternary_op()
518 gcc_assert (ternary_optab->handlers[(int) mode].insn_code in expand_ternary_op()
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HDreload.h133 enum insn_code secondary_in_icode;
135 enum insn_code secondary_out_icode;
252 extern enum reg_class scratch_reload_class (enum insn_code);
HDgenextract.c60 int insn_code; member
115 link->insn_code = insn_code_number; in gen_insn()
421 link->insn_code = insn_code_number; in main()
434 printf (" case %d:\n", link->insn_code); in main()
451 i = link->insn_code; in main()
HDexpr.c200 enum insn_code movmem_optab[NUM_MACHINE_MODES];
203 enum insn_code setmem_optab[NUM_MACHINE_MODES];
207 enum insn_code cmpstr_optab[NUM_MACHINE_MODES];
208 enum insn_code cmpstrn_optab[NUM_MACHINE_MODES];
209 enum insn_code cmpmem_optab[NUM_MACHINE_MODES];
212 enum insn_code sync_add_optab[NUM_MACHINE_MODES];
213 enum insn_code sync_sub_optab[NUM_MACHINE_MODES];
214 enum insn_code sync_ior_optab[NUM_MACHINE_MODES];
215 enum insn_code sync_and_optab[NUM_MACHINE_MODES];
216 enum insn_code sync_xor_optab[NUM_MACHINE_MODES];
[all …]
HDexpmed.c398 && (vec_set_optab->handlers[GET_MODE (op0)].insn_code in store_bit_field()
406 int icode = (int) vec_set_optab->handlers[outermode].insn_code; in store_bit_field()
512 && (movstrict_optab->handlers[fieldmode].insn_code in store_bit_field()
515 int icode = movstrict_optab->handlers[fieldmode].insn_code; in store_bit_field()
1133 && (vec_extract_optab->handlers[GET_MODE (op0)].insn_code in extract_bit_field()
1140 int icode = (int) vec_extract_optab->handlers[outermode].insn_code; in extract_bit_field()
3470 if (moptab->handlers[wider_mode].insn_code != CODE_FOR_nothing in expand_mult_highpart_optab()
3480 if (smul_optab->handlers[wider_mode].insn_code != CODE_FOR_nothing in expand_mult_highpart_optab()
3507 if (moptab->handlers[wider_mode].insn_code != CODE_FOR_nothing in expand_mult_highpart_optab()
3628 if (lshr_optab->handlers[mode].insn_code == CODE_FOR_nothing in expand_smod_pow2()
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HDtree-vect-patterns.c491 enum insn_code icode; in vect_pattern_recog_1()
499 || (icode = optab->handlers[(int) vec_mode].insn_code) == in vect_pattern_recog_1()
HDtree-vect-generic.c359 && op->handlers[mode].insn_code != CODE_FOR_nothing) in type_for_widest_vector_mode()
446 && op->handlers[compute_mode].insn_code != CODE_FOR_nothing) in expand_vector_operations_1()
HDtree-vect-transform.c918 if (vec_shr_optab->handlers[mode].insn_code != CODE_FOR_nothing) in vect_create_epilog_for_reduction()
934 if (optab->handlers[mode].insn_code == CODE_FOR_nothing) in vect_create_epilog_for_reduction()
1238 if (optab->handlers[(int) vec_mode].insn_code == CODE_FOR_nothing) in vectorizable_reduction()
1318 if (reduc_optab->handlers[(int) vec_mode].insn_code == CODE_FOR_nothing) in vectorizable_reduction()
1546 icode = (int) optab->handlers[(int) vec_mode].insn_code; in vectorizable_operation()
1694 if (mov_optab->handlers[(int)vec_mode].insn_code == CODE_FOR_nothing) in vectorizable_store()
1810 if (mov_optab->handlers[mode].insn_code == CODE_FOR_nothing) in vectorizable_load()
HDtarghooks.c531 enum insn_code icode = (in_p ? reload_in_optab[(int) reload_mode] in default_secondary_reload()
HDdojump.c278 && (cmp_optab->handlers[(int) TYPE_MODE (type)].insn_code in do_jump()
337 && (cmp_optab->handlers[(int) TYPE_MODE (type)].insn_code in do_jump()
HDfunction.c1355 int insn_code, i; in instantiate_virtual_regs_in_insn() local
1413 insn_code = INSN_CODE (insn); in instantiate_virtual_regs_in_insn()
1446 if (safe_insn_predicate (insn_code, 1, new) in instantiate_virtual_regs_in_insn()
1447 && safe_insn_predicate (insn_code, 2, x)) in instantiate_virtual_regs_in_insn()
1461 insn_code = INSN_CODE (insn); in instantiate_virtual_regs_in_insn()
1539 if (!safe_insn_predicate (insn_code, i, x)) in instantiate_virtual_regs_in_insn()
1542 x = force_reg (insn_data[insn_code].operand[i].mode, x); in instantiate_virtual_regs_in_insn()
HDreload.c249 enum insn_code *, secondary_reload_info *);
317 enum insn_code *picode, secondary_reload_info *prev_sri) in push_secondary_reload()
322 enum insn_code icode = CODE_FOR_nothing; in push_secondary_reload()
323 enum insn_code t_icode = CODE_FOR_nothing; in push_secondary_reload()
517 enum insn_code icode; in secondary_reload_class()
541 scratch_reload_class (enum insn_code icode) in scratch_reload_class()
911 enum insn_code secondary_in_icode = CODE_FOR_nothing; in push_reload()
912 enum insn_code secondary_out_icode = CODE_FOR_nothing; in push_reload()
5698 int icode = (int) add_optab->handlers[(int) Pmode].insn_code; in find_reloads_address_1()
HDtree-vectorizer.c1609 if (vec_realign_load_optab->handlers[mode].insn_code != CODE_FOR_nothing in vect_supportable_dr_alignment()
1614 if (movmisalign_optab->handlers[mode].insn_code != CODE_FOR_nothing) in vect_supportable_dr_alignment()
HDreload1.c278 enum insn_code reload_in_optab[NUM_MACHINE_MODES];
279 enum insn_code reload_out_optab[NUM_MACHINE_MODES];
6352 enum insn_code icode) in reload_adjust_reg_for_icode()
6607 enum insn_code icode; in emit_input_reload_insns()
6608 enum insn_code tertiary_icode = CODE_FOR_nothing; in emit_input_reload_insns()
6898 enum insn_code tertiary_icode in emit_output_reload_insns()
7748 code = (int) add_optab->handlers[(int) GET_MODE (out)].insn_code; in gen_reload()
HDbuiltins.c1850 if (builtin_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing) in expand_builtin_mathfn()
1988 if (builtin_optab->handlers[(int) mode].insn_code == CODE_FOR_nothing) in expand_builtin_mathfn_2()
2086 if (builtin_optab->handlers[(int) mode].insn_code == CODE_FOR_nothing) { in expand_builtin_mathfn_3()
2099 if (builtin_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing) in expand_builtin_mathfn_3()
2188 if (sincos_optab->handlers[(int) mode].insn_code == CODE_FOR_nothing) in expand_builtin_sincos()
2256 if (builtin_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing) in expand_builtin_int_roundingfn()
2645 enum insn_code icode = CODE_FOR_nothing; in expand_builtin_strlen()
2674 icode = strlen_optab->handlers[(int) insn_mode].insn_code; in expand_builtin_strlen()
5633 enum insn_code icode; in expand_builtin_lock_release()
HDstmt.c2159 #define CASE_USE_BIT_TESTS (ashl_optab->handlers[word_mode].insn_code \
HDgimplify.c5083 enum insn_code *optab; in gimplify_omp_atomic_fetch_op()
HDcombine.c10064 && cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing) in simplify_comparison()
10145 && cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing) in simplify_comparison()
/NextBSD/contrib/gcc/config/rs6000/
HDrs6000.c266 const enum insn_code icode;
669 static rtx rs6000_expand_unop_builtin (enum insn_code, tree, rtx);
670 static rtx rs6000_expand_binop_builtin (enum insn_code, tree, rtx);
671 static rtx rs6000_expand_ternop_builtin (enum insn_code, tree, rtx);
683 static rtx spe_expand_stv_builtin (enum insn_code, tree);
684 static rtx spe_expand_predicate_builtin (enum insn_code, tree, rtx);
685 static rtx spe_expand_evsel_builtin (enum insn_code, tree, rtx);
694 static rtx altivec_expand_abs_builtin (enum insn_code, tree, rtx);
695 static rtx altivec_expand_predicate_builtin (enum insn_code,
697 static rtx altivec_expand_lv_builtin (enum insn_code, tree, rtx);
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/NextBSD/contrib/gcc/config/mips/
HDmips.c398 static rtx mips_prepare_builtin_arg (enum insn_code, unsigned int, tree *);
399 static rtx mips_prepare_builtin_target (enum insn_code, unsigned int, rtx);
402 static rtx mips_expand_builtin_direct (enum insn_code, rtx, tree, bool);
404 enum insn_code, enum mips_fp_condition,
407 enum insn_code, enum mips_fp_condition,
10041 enum insn_code icode;
10308 mips_prepare_builtin_arg (enum insn_code icode, in mips_prepare_builtin_arg()
10335 mips_prepare_builtin_target (enum insn_code icode, unsigned int op, rtx target) in mips_prepare_builtin_target()
10353 enum insn_code icode; in mips_expand_builtin()
10648 mips_expand_builtin_direct (enum insn_code icode, rtx target, tree arglist, in mips_expand_builtin_direct()
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/NextBSD/contrib/gcc/config/i386/
HDi386.c1394 static rtx ix86_expand_unop1_builtin (enum insn_code, tree, rtx);
1395 static rtx ix86_expand_unop_builtin (enum insn_code, tree, rtx, int);
1396 static rtx ix86_expand_binop_builtin (enum insn_code, tree, rtx);
1397 static rtx ix86_expand_store_builtin (enum insn_code, tree);
15005 const enum insn_code icode;
16147 ix86_expand_binop_builtin (enum insn_code icode, tree arglist, rtx target) in ix86_expand_binop_builtin()
16215 ix86_expand_store_builtin (enum insn_code icode, tree arglist) in ix86_expand_store_builtin()
16240 ix86_expand_unop_builtin (enum insn_code icode, tree arglist, in ix86_expand_unop_builtin()
16276 ix86_expand_unop1_builtin (enum insn_code icode, tree arglist, rtx target) in ix86_expand_unop1_builtin()
16550 enum insn_code icode; in ix86_expand_builtin()
/NextBSD/contrib/gcc/config/arm/
HDarm.c141 static rtx arm_expand_binop_builtin (enum insn_code, tree, rtx);
142 static rtx arm_expand_unop_builtin (enum insn_code, tree, rtx, int);
12136 const enum insn_code icode;
12634 arm_expand_binop_builtin (enum insn_code icode, in arm_expand_binop_builtin()
12673 arm_expand_unop_builtin (enum insn_code icode, in arm_expand_unop_builtin()
12718 enum insn_code icode; in arm_expand_builtin()
/NextBSD/contrib/gcc/config/ia64/
HDia64.c2090 enum insn_code icode; in ia64_expand_atomic_op()

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