Home
last modified time | relevance | path

Searched refs:ints (Results 1 – 25 of 79) sorted by relevance

1234

/NextBSD/sys/dev/ath/ath_hal/ar5212/
HDar5212_interrupts.c138 ar5212SetInterrupts(struct ath_hal *ah, HAL_INT ints) in ar5212SetInterrupts() argument
145 __func__, omask, ints); in ar5212SetInterrupts()
153 mask = ints & HAL_INT_COMMON; in ar5212SetInterrupts()
155 if (ints & HAL_INT_TX) { in ar5212SetInterrupts()
165 if (ints & HAL_INT_RX) in ar5212SetInterrupts()
167 if (ints & (HAL_INT_BMISC)) { in ar5212SetInterrupts()
169 if (ints & HAL_INT_TIM) in ar5212SetInterrupts()
171 if (ints & HAL_INT_DTIM) in ar5212SetInterrupts()
173 if (ints & HAL_INT_DTIMSYNC) in ar5212SetInterrupts()
175 if (ints & HAL_INT_CABEND) in ar5212SetInterrupts()
[all …]
/NextBSD/sys/dev/ath/ath_hal/ar5416/
HDar5416_interrupts.c264 ar5416SetInterrupts(struct ath_hal *ah, HAL_INT ints) in ar5416SetInterrupts() argument
271 __func__, omask, ints); in ar5416SetInterrupts()
287 mask = ints & HAL_INT_COMMON; in ar5416SetInterrupts()
295 if (ints & HAL_INT_RX) in ar5416SetInterrupts()
298 if (ints & HAL_INT_RX) in ar5416SetInterrupts()
301 if (ints & HAL_INT_TX) { in ar5416SetInterrupts()
313 if (ints & (HAL_INT_BMISC)) { in ar5416SetInterrupts()
315 if (ints & HAL_INT_TIM) in ar5416SetInterrupts()
317 if (ints & HAL_INT_DTIM) in ar5416SetInterrupts()
319 if (ints & HAL_INT_DTIMSYNC) in ar5416SetInterrupts()
[all …]
/NextBSD/sys/sys/mach/
HDmach_types.defs99 * mach_port_status_t (9 ints) or a
101 * mach_port_info_ext_t (17 ints). If new flavors of
113 * security_token_t (2 ints)
114 * audit_token_t (8 ints)
115 * mach_port_context_t (2 ints)
212 * thread_basic_info_t (10 ints)
213 * policy_timeshare_info_t (5 ints)
214 * policy_fifo_info_t (4 ints)
215 * policy_rr_info_t (5 ints)
226 * task_basic_info_32_t (8 ints)
[all …]
/NextBSD/sys/contrib/dev/ath/ath_hal/ar9300/
HDar9300_interrupts.c497 ar9300_set_interrupts(struct ath_hal *ah, HAL_INT ints, HAL_BOOL nortc) argument
507 "%s: 0x%x => 0x%x\n", __func__, omask, ints);
533 if (ints & HAL_INT_GLOBAL) {
559 mask = ints & HAL_INT_COMMON;
563 if (ints & HAL_INT_TX) {
577 if (ints & HAL_INT_RX) {
591 if (ints & (HAL_INT_BMISC)) {
593 if (ints & HAL_INT_TIM) {
596 if (ints & HAL_INT_DTIM) {
599 if (ints & HAL_INT_DTIMSYNC) {
[all …]
HDar9300_freebsd.c442 ar9300_set_interrupts_freebsd(struct ath_hal *ah, HAL_INT ints) in ar9300_set_interrupts_freebsd() argument
446 return ar9300_set_interrupts(ah, ints, 0); in ar9300_set_interrupts_freebsd()
HDar9300_mci.c1281 u_int32_t ar9300_mci_check_int(struct ath_hal *ah, u_int32_t ints) in ar9300_mci_check_int() argument
1286 return ((reg & ints) == ints); in ar9300_mci_check_int()
HDar9300_stub_funcs.h28 extern HAL_INT ar9300_Stub_SetInterrupts(struct ath_hal *ah, HAL_INT ints);
/NextBSD/sys/dev/ath/ath_hal/ar5211/
HDar5211_interrupts.c106 ar5211SetInterrupts(struct ath_hal *ah, HAL_INT ints) in ar5211SetInterrupts() argument
113 __func__, omask, ints); in ar5211SetInterrupts()
127 mask = ints & HAL_INT_COMMON; in ar5211SetInterrupts()
128 if (ints & HAL_INT_TX) { in ar5211SetInterrupts()
138 if (ints & HAL_INT_RX) in ar5211SetInterrupts()
140 if (ints & HAL_INT_FATAL) { in ar5211SetInterrupts()
151 ahp->ah_maskReg = ints; in ar5211SetInterrupts()
154 if (ints & HAL_INT_GLOBAL) { in ar5211SetInterrupts()
HDar5211_xmit.c41 HAL_INT ints = ar5211GetInterrupts(ah); in ar5211UpdateTxTrigLevel() local
47 ar5211SetInterrupts(ah, ints &~ HAL_INT_GLOBAL); in ar5211UpdateTxTrigLevel()
62 ar5211SetInterrupts(ah, ints); in ar5211UpdateTxTrigLevel()
70 ar5211SetInterrupts(ah, ints); in ar5211UpdateTxTrigLevel()
HDar5211.h318 extern HAL_INT ar5211SetInterrupts(struct ath_hal *, HAL_INT ints);
/NextBSD/sys/dev/ath/ath_hal/ar5210/
HDar5210_interrupts.c89 ar5210SetInterrupts(struct ath_hal *ah, HAL_INT ints) in ar5210SetInterrupts() argument
96 __func__, omask, ints); in ar5210SetInterrupts()
108 mask = ints & (HAL_INT_COMMON - HAL_INT_BNR); in ar5210SetInterrupts()
109 if (ints & HAL_INT_RX) in ar5210SetInterrupts()
111 if (ints & HAL_INT_TX) { in ar5210SetInterrupts()
125 ahp->ah_maskReg = ints; in ar5210SetInterrupts()
128 if (ints & HAL_INT_GLOBAL) { in ar5210SetInterrupts()
HDar5210_xmit.c332 HAL_INT ints = ar5210GetInterrupts(ah); in ar5210UpdateTxTrigLevel() local
338 (void) ar5210SetInterrupts(ah, ints &~ HAL_INT_GLOBAL); in ar5210UpdateTxTrigLevel()
352 ar5210SetInterrupts(ah, ints); in ar5210UpdateTxTrigLevel()
359 ar5210SetInterrupts(ah, ints); in ar5210UpdateTxTrigLevel()
HDar5210.h292 extern HAL_INT ar5210SetInterrupts(struct ath_hal *, HAL_INT ints);
/NextBSD/sys/dev/uart/
HDuart_dev_pl011.c353 uint32_t ints; in uart_pl011_bus_ipend() local
359 ints = __uart_getreg(bas, UART_MIS); in uart_pl011_bus_ipend()
362 if (ints & (UART_RXREADY | RIS_RTIM)) in uart_pl011_bus_ipend()
364 if (ints & RIS_BE) in uart_pl011_bus_ipend()
366 if (ints & RIS_OE) in uart_pl011_bus_ipend()
368 if (ints & UART_TXEMPTY) { in uart_pl011_bus_ipend()
411 uint32_t ints, xc; in uart_pl011_bus_receive() local
417 ints = __uart_getreg(bas, UART_MIS); in uart_pl011_bus_receive()
418 while (ints & (UART_RXREADY | RIS_RTIM)) { in uart_pl011_bus_receive()
434 ints = __uart_getreg(bas, UART_MIS); in uart_pl011_bus_receive()
/NextBSD/sys/arm/samsung/exynos/
HDexynos_uart.c322 uint32_t ints; in exynos4210_bus_ipend() local
328 ints = bus_space_read_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UINTP); in exynos4210_bus_ipend()
329 bus_space_write_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UINTP, ints); in exynos4210_bus_ipend()
335 if ((ints & txempty) > 0) { in exynos4210_bus_ipend()
347 if ((ints & rxready) > 0) { in exynos4210_bus_ipend()
/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDAMDGPUInstrInfo.td82 // out = max(a, b) a and b are signed ints
87 // out = max(a, b) a and b are unsigned ints
104 // out = max(a, b, c) a, b, and c are signed ints
109 // out = max(a, b, c) a, b and c are unsigned ints
119 // out = min(a, b, c) a, b and c are signed ints
124 // out = min(a, b) a and b are unsigned ints
/NextBSD/cddl/usr.sbin/dtrace/tests/common/printf/
HDMakefile29 tst.ints.d \
30 tst.ints.d.out \
/NextBSD/sys/dev/patm/
HDif_patm_intr.c112 const uint32_t ints = IDT_STAT_TSIF | IDT_STAT_TXICP | IDT_STAT_TSQF | in patm_intr() local
121 patm_nor_write(sc, IDT_NOR_STAT, stat & (ints | fbqa)); in patm_intr()
166 while ((stat & ints) != 0) { in patm_intr()
215 patm_nor_write(sc, IDT_NOR_STAT, ints & stat); in patm_intr()
/NextBSD/contrib/llvm/lib/Target/PowerPC/
HDPPCCallingConv.td88 // Only handle ints and floats. All ints are promoted to i64.
89 // Vector types and quadword ints are not handled.
102 // All small ints are promoted to i64. Vector types, quadword ints,
/NextBSD/sys/dev/tl/
HDif_tl.c1638 u_int16_t ints = 0; local
1645 ints = CSR_READ_2(sc, TL_HOST_INT);
1646 CSR_WRITE_2(sc, TL_HOST_INT, ints);
1647 type = (ints << 16) & 0xFFFF0000;
1648 ivec = (ints & TL_VEC_MASK) >> 5;
1649 ints = (ints & TL_INT_MASK) >> 2;
1653 switch(ints) {
/NextBSD/contrib/gdtoa/
HDchanges35 reasonably with huge numbers and 16-bit ints.
50 With 32-bit ints, the former could give too small a block for the return
51 value when, e.g., mode = 2 or 4 and ndigits = 24 (16 for 16-bit ints).
54 dtoa.c: tweak to work with 32-bit ints and 64-bit longs
161 interesting bits stored in 3 unsigned 32-bit ints (with a "hole", 16
163 family now deals with 80-bit (5 unsigned 16-bit ints) rather than
164 96-bit arrays (3 unsigned 32-bit ints) that hold its 80-bit
/NextBSD/contrib/bzip2/
HDCHANGES125 which supports 64-bit ints, so, except for the C library
215 on selected platforms which support 64-bit ints. At the moment
/NextBSD/sys/dev/pci/
HDpcib_if.m111 # to an array of at least 'count' ints. The max number of messages this
/NextBSD/contrib/llvm/lib/Target/Sparc/
HDSparcCallingConv.td81 // Two ints in a struct are simply coerced to i64:
/NextBSD/crypto/openssl/doc/crypto/
HDBN_generate_prime.pod101 and passes the ints B<a> and B<b> as arguments. There are two types of

1234