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Searched refs:isBuildVectorAllZeros (Results 1 – 6 of 6) sorted by relevance

/NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/
HDDAGCombiner.cpp1636 if (ISD::isBuildVectorAllZeros(N1.getNode())) in visitADD()
1638 if (ISD::isBuildVectorAllZeros(N0.getNode())) in visitADD()
1874 if (ISD::isBuildVectorAllZeros(N1.getNode())) in visitSUB()
2901 if (ISD::isBuildVectorAllZeros(N0.getNode())) in visitAND()
2907 if (ISD::isBuildVectorAllZeros(N1.getNode())) in visitAND()
3569 if (ISD::isBuildVectorAllZeros(N0.getNode())) in visitOR()
3571 if (ISD::isBuildVectorAllZeros(N1.getNode())) in visitOR()
3596 ISD::isBuildVectorAllZeros(N0.getOperand(1).getNode())) { in visitOR()
3975 if (ISD::isBuildVectorAllZeros(N0.getNode())) in visitXOR()
3977 if (ISD::isBuildVectorAllZeros(N1.getNode())) in visitXOR()
[all …]
HDSelectionDAG.cpp146 bool ISD::isBuildVectorAllZeros(const SDNode *N) { in isBuildVectorAllZeros() function in ISD
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86ISelLowering.cpp5356 if (ISD::isBuildVectorAllZeros(Op.getNode())) { in LowerBUILD_VECTORvXi1()
5852 if (ISD::isBuildVectorAllZeros(Op.getNode())) { in LowerBUILD_VECTOR()
6232 bool IsZeroV1 = ISD::isBuildVectorAllZeros(V1.getNode()); in LowerCONCAT_VECTORSvXi1()
6233 bool IsZeroV2 = ISD::isBuildVectorAllZeros(V2.getNode()); in LowerCONCAT_VECTORSvXi1()
6805 bool V1IsZero = ISD::isBuildVectorAllZeros(V1.getNode()); in computeZeroableShuffleElements()
6806 bool V2IsZero = ISD::isBuildVectorAllZeros(V2.getNode()); in computeZeroableShuffleElements()
9534 bool IsV1Zero = ISD::isBuildVectorAllZeros(V1.getNode()); in lowerV2X128VectorShuffle()
9535 bool IsV2Zero = ISD::isBuildVectorAllZeros(V2.getNode()); in lowerV2X128VectorShuffle()
16897 if (!ISD::isBuildVectorAllZeros(Ahi.getNode())) { in LowerMUL()
16901 if (!ISD::isBuildVectorAllZeros(Bhi.getNode())) { in LowerMUL()
[all …]
/NextBSD/contrib/llvm/include/llvm/CodeGen/
HDSelectionDAGNodes.h74 bool isBuildVectorAllZeros(const SDNode *N);
/NextBSD/contrib/llvm/include/llvm/Target/
HDTargetSelectionDAG.td656 return ISD::isBuildVectorAllZeros(N);
/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMISelLowering.cpp4650 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
4652 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) in LowerVSETCC()
4674 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
4676 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) { in LowerVSETCC()