Searched refs:link_params (Results 1 – 6 of 6) sorted by relevance
7404 elink_link_update(&sc->link_params, &sc->link_vars); in bxe_link_attn()8535 elink_hw_reset_phy(&sc->link_params); in bxe_attn_int_deasserted0()8541 elink_handle_module_detect_int(&sc->link_params); in bxe_attn_int_deasserted0()11294 sc->link_params.shmem_base = in bxe_init_shmem()12102 return (bxe_set_mac_one(sc, sc->link_params.mac_addr, in bxe_set_eth_mac()12133 if (sc->link_params.num_phys <= 1) { in bxe_get_cur_phy_idx()12141 (sc->link_params.phy[ELINK_EXT_PHY2].supported & in bxe_get_cur_phy_idx()12145 switch (elink_phy_selection(&sc->link_params)) { in bxe_get_cur_phy_idx()12172 if (sc->link_params.multi_phy_config & PORT_HW_CFG_PHY_SWAPPED_ENABLED) { in bxe_get_link_cfg_idx()12191 sc->link_params.req_fc_auto_adv = ELINK_FLOW_CTRL_TX; in bxe_set_requested_fc()[all …]
1563 struct elink_params link_params; member
173 const struct al_pcie_link_params *link_params) in al_pcie_port_link_config() argument178 if ((link_params->max_payload_size != AL_PCIE_MPS_DEFAULT) && in al_pcie_port_link_config()179 (link_params->max_payload_size != AL_PCIE_MPS_128) && in al_pcie_port_link_config()180 (link_params->max_payload_size != AL_PCIE_MPS_256)) { in al_pcie_port_link_config()182 pcie_port->port_id, link_params->max_payload_size); in al_pcie_port_link_config()187 pcie_port->port_id, link_params->max_speed, in al_pcie_port_link_config()188 pcie_port->max_lanes, link_params->enable_reversal? "enable" : "disable"); in al_pcie_port_link_config()190 al_pcie_port_link_speed_ctrl_set(pcie_port, link_params->max_speed); in al_pcie_port_link_config()195 if (link_params->max_payload_size != AL_PCIE_MPS_DEFAULT) in al_pcie_port_link_config()198 link_params->max_payload_size << in al_pcie_port_link_config()[all …]
441 struct al_pcie_link_params *link_params; member
471 struct edp_link_params link_params[16]; member
525 edp_link_params = &edp->link_params[panel_type]; in parse_edp()