| /NextBSD/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| HD | ARMAddressingModes.h | 657 uint32_t Sign = Imm.lshr(31).getZExtValue() & 1; in getFP32Imm() 658 int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127 in getFP32Imm() 685 uint64_t Sign = Imm.lshr(63).getZExtValue() & 1; in getFP64Imm() 686 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023 in getFP64Imm()
|
| /NextBSD/contrib/llvm/lib/Transforms/InstCombine/ |
| HD | InstCombineSimplifyDemanded.cpp | 568 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt)); in SimplifyDemandedUseBits() 605 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); in SimplifyDemandedUseBits() 606 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); in SimplifyDemandedUseBits() 652 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); in SimplifyDemandedUseBits() 653 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); in SimplifyDemandedUseBits() 658 SignBit = APIntOps::lshr(SignBit, ShiftAmt); in SimplifyDemandedUseBits() 829 BitMask1 = isLshr ? (BitMask1.lshr(ShrAmt) << ShlAmt) : in SimplifyShrShlDemandedBits() 835 BitMask2 = isLshr ? BitMask2.lshr(ShrAmt - ShlAmt): in SimplifyShrShlDemandedBits()
|
| HD | InstCombineShifts.cpp | 400 MaskV = MaskV.lshr(COp1->getZExtValue()); in FoldShiftByConstant()
|
| HD | InstCombineCompares.cpp | 1005 Comp = Comp.lshr(ShAmtVal); in FoldICmpShrCst() 1087 if (IsAShr ? AP1 == AP2.ashr(Shift) : AP1 == AP2.lshr(Shift)) in FoldICmpCstShrCst()
|
| /NextBSD/contrib/llvm/lib/Target/AArch64/MCTargetDesc/ |
| HD | AArch64AddressingModes.h | 371 uint32_t Sign = Imm.lshr(31).getZExtValue() & 1; in getFP32Imm() 372 int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127 in getFP32Imm() 399 uint64_t Sign = Imm.lshr(63).getZExtValue() & 1; in getFP64Imm() 400 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023 in getFP64Imm()
|
| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonGenExtract.cpp | 161 APInt A = APInt(BW, ~0ULL).lshr(SR).shl(SL); in INITIALIZE_PASS_DEPENDENCY() 167 APInt M = CM->getValue().lshr(SL); in INITIALIZE_PASS_DEPENDENCY()
|
| /NextBSD/contrib/llvm/include/llvm/ADT/ |
| HD | APInt.h | 541 return getAllOnesValue(numBits).lshr(numBits - loBitsSet); in getLowBitsSet() 863 APInt LLVM_ATTRIBUTE_UNUSED_RESULT lshr(unsigned shiftAmt) const; 892 APInt LLVM_ATTRIBUTE_UNUSED_RESULT lshr(const APInt &shiftAmt) const; 1840 inline APInt lshr(const APInt &LHS, unsigned shiftAmt) { in lshr() function 1841 return LHS.lshr(shiftAmt); in lshr()
|
| HD | APSInt.h | 124 return IsUnsigned ? APSInt(lshr(Amt), true) : APSInt(ashr(Amt), false);
|
| /NextBSD/contrib/llvm/include/llvm/IR/ |
| HD | ConstantRange.h | 256 ConstantRange lshr(const ConstantRange &Other) const;
|
| /NextBSD/contrib/llvm/lib/Support/ |
| HD | APInt.cpp | 685 return APIntOps::lshr(*this, BitWidth - numBits); in getHiBits() 690 return APIntOps::lshr(APIntOps::shl(*this, BitWidth - numBits), in getLoBits() 1136 APInt APInt::lshr(const APInt &shiftAmt) const { in lshr() function in APInt 1137 return lshr((unsigned)shiftAmt.getLimitedValue(BitWidth)); in lshr() 1142 APInt APInt::lshr(unsigned shiftAmt) const { in lshr() function in APInt 1275 return shl(rotateAmt) | lshr(BitWidth - rotateAmt); in rotl() 1286 return lshr(rotateAmt) | shl(BitWidth - rotateAmt); in rotr() 1425 t = signedMin + (d.lshr(d.getBitWidth() - 1)); in magic() 1467 APInt allOnes = APInt::getAllOnesValue(d.getBitWidth()).lshr(LeadingZeros); in magicu() 2242 Tmp = Tmp.lshr(ShiftAmt); in toString()
|
| /NextBSD/contrib/llvm/lib/IR/ |
| HD | ConstantRange.cpp | 736 ConstantRange::lshr(const ConstantRange &Other) const { in lshr() function in ConstantRange 740 APInt max = getUnsignedMax().lshr(Other.getUnsignedMin()); in lshr() 741 APInt min = getUnsignedMin().lshr(Other.getUnsignedMax()); in lshr()
|
| HD | ConstantFold.cpp | 225 V = V.lshr(ByteStart*8); in ExtractConstantBytes() 1147 return ConstantInt::get(CI1->getContext(), C1V.lshr(C2V)); in ConstantFoldBinaryInstruction()
|
| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | TargetLowering.cpp | 638 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), in SimplifyDemandedBits() 648 if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 && in SimplifyDemandedBits() 674 NewMask.lshr(InnerBits - InnerShAmt + ShAmt) == 0 && in SimplifyDemandedBits() 738 KnownZero = KnownZero.lshr(ShAmt); in SimplifyDemandedBits() 739 KnownOne = KnownOne.lshr(ShAmt); in SimplifyDemandedBits() 780 KnownZero = KnownZero.lshr(ShAmt); in SimplifyDemandedBits() 781 KnownOne = KnownOne.lshr(ShAmt); in SimplifyDemandedBits() 784 APInt SignBit = APInt::getSignBit(BitWidth).lshr(ShAmt); in SimplifyDemandedBits() 1020 HighBits = HighBits.lshr(ShAmt->getZExtValue()).trunc(BitWidth); in SimplifyDemandedBits() 1409 bestMask = Mask.lshr(offset * (width/8) * 8); in SimplifySetCC() [all …]
|
| HD | SelectionDAG.cpp | 1179 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits) in getConstant() 2171 KnownZero = KnownZero.lshr(ShAmt); in computeKnownBits() 2172 KnownOne = KnownOne.lshr(ShAmt); in computeKnownBits() 2191 KnownZero = KnownZero.lshr(ShAmt); in computeKnownBits() 2192 KnownOne = KnownOne.lshr(ShAmt); in computeKnownBits() 2196 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. in computeKnownBits() 3181 case ISD::SRL: return std::make_pair(C1.lshr(C2), true); in FoldValue() 3596 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); in getNode() 7047 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); in isConstantSplat() 7049 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); in isConstantSplat()
|
| /NextBSD/contrib/llvm/tools/clang/lib/CodeGen/ |
| HD | CGExprConstant.cpp | 203 Tmp = Tmp.lshr(NewFieldWidth); in AppendBitField() 212 FieldValue = FieldValue.lshr(BitsInPreviousByte); in AppendBitField() 270 FieldValue.lshr(FieldValue.getBitWidth() - CharWidth).trunc(CharWidth); in AppendBitField() 275 FieldValue = FieldValue.lshr(CharWidth); in AppendBitField()
|
| /NextBSD/contrib/llvm/lib/Analysis/ |
| HD | ValueTracking.cpp | 841 KnownZero |= RHSKnownZero.lshr(C->getZExtValue()); in computeKnownBitsFromAssume() 842 KnownOne |= RHSKnownOne.lshr(C->getZExtValue()); in computeKnownBitsFromAssume() 851 KnownZero |= RHSKnownOne.lshr(C->getZExtValue()); in computeKnownBitsFromAssume() 852 KnownOne |= RHSKnownZero.lshr(C->getZExtValue()); in computeKnownBitsFromAssume() 1098 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); in computeKnownBitsFromOperator() 1099 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); in computeKnownBitsFromOperator() 1112 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); in computeKnownBitsFromOperator() 1113 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); in computeKnownBitsFromOperator()
|
| HD | LazyValueInfo.cpp | 802 Result.markConstantRange(LHSRange.lshr(RHSRange)); in solveBlockValueConstantRange()
|
| HD | InstructionSimplify.cpp | 2283 Upper = Lower.lshr(1) + 1; in SimplifyICmpInst() 2328 Upper = NegOne.lshr(CI2->getValue()) + 1; in SimplifyICmpInst() 2334 Lower = CI2->getValue().lshr(ShiftAmount); in SimplifyICmpInst()
|
| HD | ScalarEvolution.cpp | 1021 Mult = Mult.lshr(TwoFactors); in BinomialCoefficient() 3902 APInt::getMaxValue(BitWidth).lshr(TZ).shl(TZ) + 1); in getRange() 5993 APInt AD = A.lshr(Mult2).zext(BW + 1); // AD = A / D in SolveLinEquationWithOverflow() 6000 APInt Result = (I * B.lshr(Mult2).zext(BW + 1)).urem(Mod); in SolveLinEquationWithOverflow()
|
| /NextBSD/contrib/llvm/lib/Transforms/Scalar/ |
| HD | BDCE.cpp | 159 AB = AOut.lshr(ShiftAmt); in determineLiveOperandBits()
|
| /NextBSD/contrib/gcc/ |
| HD | libgcc2.h | 264 #define __lshrdi3 __NDW(lshr,3)
|
| /NextBSD/contrib/llvm/lib/ExecutionEngine/Interpreter/ |
| HD | Execution.cpp | 1178 Result.IntVal = valueToShift.lshr(getShiftAmount(shiftAmount, valueToShift)); in visitLShr() 1185 Dest.IntVal = valueToShift.lshr(getShiftAmount(shiftAmount, valueToShift)); in visitLShr() 1584 Elt.IntVal = Elt.IntVal.lshr(ShiftAmt); in executeBitCastInst() 2045 Dest.IntVal = Op0.IntVal.lshr(Op1.IntVal.getZExtValue()); in getConstantExprValue()
|
| /NextBSD/contrib/llvm/lib/AsmParser/ |
| HD | LLLexer.cpp | 709 INSTKEYWORD(shl, Shl); INSTKEYWORD(lshr, LShr); INSTKEYWORD(ashr, AShr); in LexIdentifier()
|
| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelDAGToDAG.cpp | 1693 OpUsefulBits = OpUsefulBits.lshr(OpUsefulBits.getBitWidth() - Imm); in getUsefulBitsFromBitfieldMoveOpd() 1722 Mask = Mask.lshr(ShiftAmt); in getUsefulBitsFromOrWithShiftedReg() 1728 Mask = Mask.lshr(ShiftAmt); in getUsefulBitsFromOrWithShiftedReg()
|
| /NextBSD/contrib/gcc/config/ia64/ |
| HD | vect.md | 335 (define_insn "lshr<mode>3"
|