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Searched refs:mdev (Results 1 – 25 of 51) sorted by relevance

123

/NextBSD/sys/ofed/drivers/infiniband/hw/mthca/
HDmthca_main.c137 static int mthca_tune_pci(struct mthca_dev *mdev) in mthca_tune_pci() argument
143 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) { in mthca_tune_pci()
144 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) { in mthca_tune_pci()
145 mthca_err(mdev, "Couldn't set PCI-X max read count, " in mthca_tune_pci()
149 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) in mthca_tune_pci()
150 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); in mthca_tune_pci()
152 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP)) { in mthca_tune_pci()
153 if (pcie_set_readrq(mdev->pdev, 4096)) { in mthca_tune_pci()
154 mthca_err(mdev, "Couldn't write PCI Express read request, " in mthca_tune_pci()
158 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) in mthca_tune_pci()
[all …]
HDmthca_reset.c41 int mthca_reset(struct mthca_dev *mdev) in mthca_reset() argument
73 if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) { in mthca_reset()
77 while ((bridge = pci_get_device(mdev->pdev->vendor, in mthca_reset()
78 mdev->pdev->device + 2, in mthca_reset()
81 bridge->subordinate == mdev->pdev->bus) { in mthca_reset()
82 mthca_dbg(mdev, "Found bridge: %s\n", in mthca_reset()
94 mthca_warn(mdev, "No bridge found for %s\n", in mthca_reset()
95 pci_name(mdev->pdev)); in mthca_reset()
98 mthca_warn(mdev, "Reset on PCI-X is not supported.\n"); in mthca_reset()
108 mthca_err(mdev, "Couldn't allocate memory to save HCA " in mthca_reset()
[all …]
HDmthca_provider.c64 struct mthca_dev *mdev = to_mdev(ibdev); in mthca_query_device() local
75 props->fw_ver = mdev->fw_ver; in mthca_query_device()
80 err = mthca_MAD_IFC(mdev, 1, 1, in mthca_query_device()
90 props->device_cap_flags = mdev->device_cap_flags; in mthca_query_device()
98 props->page_size_cap = mdev->limits.page_size_cap; in mthca_query_device()
99 props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps; in mthca_query_device()
100 props->max_qp_wr = mdev->limits.max_wqes; in mthca_query_device()
101 props->max_sge = mdev->limits.max_sg; in mthca_query_device()
102 props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs; in mthca_query_device()
103 props->max_cqe = mdev->limits.max_cqes; in mthca_query_device()
[all …]
/NextBSD/sys/ofed/drivers/net/mlx4/
HDen_main.c71 static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) in mlx4_en_get_profile() argument
73 struct mlx4_en_profile *params = &mdev->profile; in mlx4_en_get_profile()
79 if (params->udp_rss && !(mdev->dev->caps.flags in mlx4_en_get_profile()
81 mlx4_warn(mdev, "UDP RSS is not supported on this device.\n"); in mlx4_en_get_profile()
109 struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr; in mlx4_en_event() local
115 if (!mdev->pndev[port]) in mlx4_en_event()
117 priv = netdev_priv(mdev->pndev[port]); in mlx4_en_event()
121 queue_work(mdev->workqueue, &priv->linkstate_task); in mlx4_en_event()
125 mlx4_err(mdev, "Internal error detected, restarting device\n"); in mlx4_en_event()
133 !mdev->pndev[port]) in mlx4_en_event()
[all …]
HDen_cq.c52 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_create_cq() local
66 cq->buf_size = cq->size * mdev->dev->caps.cqe_size; in mlx4_en_create_cq()
85 err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres, in mlx4_en_create_cq()
100 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size); in mlx4_en_create_cq()
110 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_activate_cq() local
115 cq->dev = mdev->pndev[priv->port]; in mlx4_en_activate_cq()
123 if (mdev->dev->caps.comp_pool) { in mlx4_en_activate_cq()
128 if (mlx4_assign_eq(mdev->dev, name, &cq->vector)) { in mlx4_en_activate_cq()
130 % mdev->dev->caps.num_comp_vectors; in mlx4_en_activate_cq()
131 mlx4_warn(mdev, "Failed Assigning an EQ to " in mlx4_en_activate_cq()
[all …]
HDen_netdev.c185 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); in mlx4_en_filter_work()
190 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); in mlx4_en_filter_work()
256 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); in mlx4_en_filter_free()
338 queue_work(priv->mdev->workqueue, &filter->work); in mlx4_en_filter_rfs()
404 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_vlan_rx_add_vid() local
416 mutex_lock(&mdev->state_lock); in mlx4_en_vlan_rx_add_vid()
417 if (mdev->device_up && priv->port_up) { in mlx4_en_vlan_rx_add_vid()
418 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); in mlx4_en_vlan_rx_add_vid()
422 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) in mlx4_en_vlan_rx_add_vid()
424 mutex_unlock(&mdev->state_lock); in mlx4_en_vlan_rx_add_vid()
[all …]
HDen_rx.c59 rx_desc->data[0].lkey = cpu_to_be32(priv->mdev->mr.key); in mlx4_en_init_rx_desc()
276 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_create_rx_ring() local
290 bus_get_dma_tag(mdev->pdev->dev.bsddev), in mlx4_en_create_rx_ring()
340 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, in mlx4_en_create_rx_ring()
355 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size); in mlx4_en_create_rx_ring()
452 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_destroy_rx_ring() local
457 mlx4_free_hwq_res(mdev->dev, &ring->wqres, size * stride + TXBB_SIZE); in mlx4_en_destroy_rx_ring()
742 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_config_rss_qp() local
752 err = mlx4_qp_alloc(mdev->dev, qpn, qp); in mlx4_en_config_rss_qp()
765 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) { in mlx4_en_config_rss_qp()
[all …]
HDen_tx.c68 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_create_tx_ring() local
85 bus_get_dma_tag(mdev->pdev->dev.bsddev), in mlx4_en_create_tx_ring()
144 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size, in mlx4_en_create_tx_ring()
163 err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &ring->qpn, in mlx4_en_create_tx_ring()
170 err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp); in mlx4_en_create_tx_ring()
177 err = mlx4_bf_alloc(mdev->dev, &ring->bf, node); in mlx4_en_create_tx_ring()
180 ring->bf.uar = &mdev->priv_uar; in mlx4_en_create_tx_ring()
181 ring->bf.uar->map = mdev->uar_map; in mlx4_en_create_tx_ring()
193 mlx4_qp_release_range(mdev->dev, ring->qpn, 1); in mlx4_en_create_tx_ring()
197 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size); in mlx4_en_create_tx_ring()
[all …]
HDen_resources.c45 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_fill_qp_context() local
50 context->pd = cpu_to_be32(mdev->priv_pdn); in mlx4_en_fill_qp_context()
58 context->usr_page = cpu_to_be32(mdev->priv_uar.index); in mlx4_en_fill_qp_context()
68 (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_LB_SRC_CHK) && in mlx4_en_fill_qp_context()
HDen_port.c75 int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port) in mlx4_en_QUERY_PORT() argument
78 struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]); in mlx4_en_QUERY_PORT()
83 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); in mlx4_en_QUERY_PORT()
87 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, in mlx4_en_QUERY_PORT()
122 mlx4_free_cmd_mailbox(mdev->dev, mailbox); in mlx4_en_QUERY_PORT()
126 int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset) in mlx4_en_DUMP_ETH_STATS() argument
130 struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]); in mlx4_en_DUMP_ETH_STATS()
146 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); in mlx4_en_DUMP_ETH_STATS()
152 mailbox_flow = mlx4_alloc_cmd_mailbox(mdev->dev); in mlx4_en_DUMP_ETH_STATS()
154 mlx4_free_cmd_mailbox(mdev->dev, mailbox); in mlx4_en_DUMP_ETH_STATS()
[all …]
/NextBSD/sys/dev/ifmlx4/
HDen_main.c80 static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) in mlx4_en_get_profile() argument
82 struct mlx4_en_profile *params = &mdev->profile; in mlx4_en_get_profile()
88 if (params->udp_rss && !(mdev->dev->caps.flags in mlx4_en_get_profile()
90 mlx4_warn(mdev, "UDP RSS is not supported on this device.\n"); in mlx4_en_get_profile()
118 struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr; in mlx4_en_event() local
124 if (!mdev->pndev[port]) in mlx4_en_event()
126 priv = netdev_priv(mdev->pndev[port]); in mlx4_en_event()
130 queue_work(mdev->workqueue, &priv->linkstate_task); in mlx4_en_event()
134 mlx4_err(mdev, "Internal error detected, restarting device\n"); in mlx4_en_event()
142 !mdev->pndev[port]) in mlx4_en_event()
[all …]
HDen_cq.c52 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_create_cq() local
66 cq->buf_size = cq->size * mdev->dev->caps.cqe_size; in mlx4_en_create_cq()
85 err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres, in mlx4_en_create_cq()
100 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size); in mlx4_en_create_cq()
110 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_activate_cq() local
115 cq->dev = mdev->pndev[priv->port]; in mlx4_en_activate_cq()
123 if (mdev->dev->caps.comp_pool) { in mlx4_en_activate_cq()
128 if (mlx4_assign_eq(mdev->dev, name, &cq->vector)) { in mlx4_en_activate_cq()
130 % mdev->dev->caps.num_comp_vectors; in mlx4_en_activate_cq()
131 mlx4_warn(mdev, "Failed Assigning an EQ to " in mlx4_en_activate_cq()
[all …]
HDen_netdev.c185 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); in mlx4_en_filter_work()
190 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); in mlx4_en_filter_work()
256 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); in mlx4_en_filter_free()
339 queue_work(priv->mdev->workqueue, &filter->work); in mlx4_en_filter_rfs()
405 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_vlan_rx_add_vid() local
417 mutex_lock(&mdev->state_lock); in mlx4_en_vlan_rx_add_vid()
418 if (mdev->device_up && priv->port_up) { in mlx4_en_vlan_rx_add_vid()
419 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); in mlx4_en_vlan_rx_add_vid()
423 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) in mlx4_en_vlan_rx_add_vid()
425 mutex_unlock(&mdev->state_lock); in mlx4_en_vlan_rx_add_vid()
[all …]
HDen_rx.c61 rx_desc->data[i].lkey = cpu_to_be32(priv->mdev->mr.key); in mlx4_en_init_rx_desc()
81 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_alloc_buf() local
94 dma = pci_map_single(mdev->pdev, mb->m_data, frag_info->frag_size, in mlx4_en_alloc_buf()
131 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_free_rx_desc() local
148 pci_unmap_single(mdev->pdev, dma, frag_info->frag_size, in mlx4_en_free_rx_desc()
272 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_create_rx_ring() local
304 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, in mlx4_en_create_rx_ring()
319 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size); in mlx4_en_create_rx_ring()
410 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_destroy_rx_ring() local
414 mlx4_free_hwq_res(mdev->dev, &ring->wqres, size * stride + TXBB_SIZE); in mlx4_en_destroy_rx_ring()
[all …]
HDen_ethtool.c92 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_get_drvinfo() local
99 (u16) (mdev->dev->caps.fw_ver >> 32), in mlx4_en_get_drvinfo()
100 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff), in mlx4_en_get_drvinfo()
101 (u16) (mdev->dev->caps.fw_ver & 0xffff)); in mlx4_en_get_drvinfo()
102 strlcpy(drvinfo->bus_info, pci_name(mdev->dev->pdev), in mlx4_en_get_drvinfo()
262 if (!(priv->mdev->dev->caps.flags & mask)) { in mlx4_en_get_wol()
268 err = mlx4_wol_read(priv->mdev->dev, &config, priv->port); in mlx4_en_get_wol()
299 if (!(priv->mdev->dev->caps.flags & mask)) in mlx4_en_set_wol()
305 err = mlx4_wol_read(priv->mdev->dev, &config, priv->port); in mlx4_en_set_wol()
319 err = mlx4_wol_write(priv->mdev->dev, config, priv->port); in mlx4_en_set_wol()
[all …]
HDen_selftest.c44 return mlx4_cmd(priv->mdev->dev, 0, 0, 0, MLX4_CMD_HW_HEALTH_CHECK, in mlx4_en_test_registers()
118 if (mlx4_en_QUERY_PORT(priv->mdev, priv->port)) in mlx4_en_test_link()
129 if (mlx4_en_QUERY_PORT(priv->mdev, priv->port)) in mlx4_en_test_speed()
144 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_ex_selftest() local
159 if (priv->mdev->dev->caps.flags & in mlx4_en_ex_selftest()
170 buf[0] = mlx4_test_interrupts(mdev->dev); in mlx4_en_ex_selftest()
HDen_tx.c68 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_create_tx_ring() local
122 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size, in mlx4_en_create_tx_ring()
141 err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &ring->qpn, in mlx4_en_create_tx_ring()
148 err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp); in mlx4_en_create_tx_ring()
155 err = mlx4_bf_alloc(mdev->dev, &ring->bf, node); in mlx4_en_create_tx_ring()
158 ring->bf.uar = &mdev->priv_uar; in mlx4_en_create_tx_ring()
159 ring->bf.uar->map = mdev->uar_map; in mlx4_en_create_tx_ring()
171 mlx4_qp_release_range(mdev->dev, ring->qpn, 1); in mlx4_en_create_tx_ring()
175 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size); in mlx4_en_create_tx_ring()
189 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_destroy_tx_ring() local
[all …]
HDen_resources.c45 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_fill_qp_context() local
50 context->pd = cpu_to_be32(mdev->priv_pdn); in mlx4_en_fill_qp_context()
58 context->usr_page = cpu_to_be32(mdev->priv_uar.index); in mlx4_en_fill_qp_context()
68 (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_LB_SRC_CHK) && in mlx4_en_fill_qp_context()
/NextBSD/sys/dev/mlx5/mlx5_core/
HDmlx5_wq.c62 int mlx5_wq_cyc_create(struct mlx5_core_dev *mdev, struct mlx5_wq_param *param, in mlx5_wq_cyc_create() argument
72 err = mlx5_db_alloc_node(mdev, &wq_ctrl->db, param->db_numa_node); in mlx5_wq_cyc_create()
74 mlx5_core_warn(mdev, "mlx5_db_alloc() failed, %d\n", err); in mlx5_wq_cyc_create()
78 err = mlx5_buf_alloc_node(mdev, mlx5_wq_cyc_get_byte_size(wq), in mlx5_wq_cyc_create()
82 mlx5_core_warn(mdev, "mlx5_buf_alloc() failed, %d\n", err); in mlx5_wq_cyc_create()
89 wq_ctrl->mdev = mdev; in mlx5_wq_cyc_create()
94 mlx5_db_free(mdev, &wq_ctrl->db); in mlx5_wq_cyc_create()
99 int mlx5_cqwq_create(struct mlx5_core_dev *mdev, struct mlx5_wq_param *param, in mlx5_cqwq_create() argument
110 err = mlx5_db_alloc_node(mdev, &wq_ctrl->db, param->db_numa_node); in mlx5_cqwq_create()
112 mlx5_core_warn(mdev, "mlx5_db_alloc() failed, %d\n", err); in mlx5_cqwq_create()
[all …]
HDmlx5_vport.c33 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod) in mlx5_query_vport_state() argument
45 err = mlx5_cmd_exec_check_status(mdev, in, sizeof(in), out, in mlx5_query_vport_state()
48 mlx5_core_warn(mdev, "MLX5_CMD_OP_QUERY_VPORT_STATE failed\n"); in mlx5_query_vport_state()
54 static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u32 vport, in mlx5_query_nic_vport_context() argument
68 return mlx5_cmd_exec_check_status(mdev, in, sizeof(in), out, outlen); in mlx5_query_nic_vport_context()
71 int mlx5_vport_alloc_q_counter(struct mlx5_core_dev *mdev, int *counter_set_id) in mlx5_vport_alloc_q_counter() argument
83 err = mlx5_cmd_exec_check_status(mdev, in, sizeof(in), in mlx5_vport_alloc_q_counter()
94 int mlx5_vport_dealloc_q_counter(struct mlx5_core_dev *mdev, in mlx5_vport_dealloc_q_counter() argument
108 return mlx5_cmd_exec_check_status(mdev, in, sizeof(in), in mlx5_vport_dealloc_q_counter()
112 static int mlx5_vport_query_q_counter(struct mlx5_core_dev *mdev, in mlx5_vport_query_q_counter() argument
[all …]
HDmlx5_uar.c174 int mlx5_alloc_map_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar) in mlx5_alloc_map_uar() argument
180 err = mlx5_cmd_alloc_uar(mdev, &uar->index); in mlx5_alloc_map_uar()
182 mlx5_core_warn(mdev, "mlx5_cmd_alloc_uar() failed, %d\n", err); in mlx5_alloc_map_uar()
186 uar_bar_start = pci_resource_start(mdev->pdev, 0); in mlx5_alloc_map_uar()
190 mlx5_core_warn(mdev, "ioremap() failed, %d\n", err); in mlx5_alloc_map_uar()
195 if (mdev->priv.bf_mapping) in mlx5_alloc_map_uar()
196 uar->bf_map = io_mapping_map_wc(mdev->priv.bf_mapping, in mlx5_alloc_map_uar()
202 mlx5_cmd_free_uar(mdev, uar->index); in mlx5_alloc_map_uar()
208 void mlx5_unmap_free_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar) in mlx5_unmap_free_uar() argument
212 mlx5_cmd_free_uar(mdev, uar->index); in mlx5_unmap_free_uar()
/NextBSD/sys/dev/mlx5/
HDvport.h32 int mlx5_vport_alloc_q_counter(struct mlx5_core_dev *mdev,
34 int mlx5_vport_dealloc_q_counter(struct mlx5_core_dev *mdev,
36 int mlx5_vport_query_out_of_rx_buffer(struct mlx5_core_dev *mdev,
40 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod);
41 int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev,
43 int mlx5_set_nic_vport_current_mac(struct mlx5_core_dev *mdev, int vport,
47 int mlx5_set_nic_vport_mc_list(struct mlx5_core_dev *mdev, int vport,
49 int mlx5_set_nic_vport_promisc(struct mlx5_core_dev *mdev, int vport,
52 int mlx5_set_nic_vport_permanent_mac(struct mlx5_core_dev *mdev, int vport,
54 int mlx5_nic_vport_enable_roce(struct mlx5_core_dev *mdev);
[all …]
HDdevice.h1070 #define MLX5_CAP_GEN(mdev, cap) \ argument
1071 MLX5_GET(cmd_hca_cap, mdev->hca_caps_cur[MLX5_CAP_GENERAL], cap)
1073 #define MLX5_CAP_GEN_MAX(mdev, cap) \ argument
1074 MLX5_GET(cmd_hca_cap, mdev->hca_caps_max[MLX5_CAP_GENERAL], cap)
1076 #define MLX5_CAP_ETH(mdev, cap) \ argument
1078 mdev->hca_caps_cur[MLX5_CAP_ETHERNET_OFFLOADS], cap)
1080 #define MLX5_CAP_ETH_MAX(mdev, cap) \ argument
1082 mdev->hca_caps_max[MLX5_CAP_ETHERNET_OFFLOADS], cap)
1084 #define MLX5_CAP_ROCE(mdev, cap) \ argument
1085 MLX5_GET(roce_cap, mdev->hca_caps_cur[MLX5_CAP_ROCE], cap)
[all …]
/NextBSD/sys/dev/mlx5/mlx5_en/
HDmlx5_en_main.c176 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_update_carrier() local
183 port_state = mlx5_query_vport_state(mdev, in mlx5e_update_carrier()
195 error = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN); in mlx5e_update_carrier()
250 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_media_change() local
266 error = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN); in mlx5e_media_change()
281 mlx5_set_port_status(mdev, MLX5_PORT_DOWN); in mlx5e_media_change()
282 mlx5_set_port_proto(mdev, link_mode, MLX5_PTYS_EN); in mlx5e_media_change()
283 mlx5_set_port_status(mdev, MLX5_PORT_UP); in mlx5e_media_change()
306 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_update_pport_counters() local
326 mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); in mlx5e_update_pport_counters()
[all …]
/NextBSD/sys/dev/agp/
HDagp.c320 agp_v3_enable(device_t dev, device_t mdev, u_int32_t mode) in agp_v3_enable() argument
327 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); in agp_v3_enable()
383 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); in agp_v3_enable()
389 agp_v2_enable(device_t dev, device_t mdev, u_int32_t mode) in agp_v2_enable() argument
396 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); in agp_v2_enable()
436 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); in agp_v2_enable()
444 device_t mdev = agp_find_display(); in agp_generic_enable() local
447 if (!mdev) { in agp_generic_enable()
453 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); in agp_generic_enable()
466 return (agp_v3_enable(dev, mdev, mode)); in agp_generic_enable()
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