Home
last modified time | relevance | path

Searched refs:sext (Results 1 – 25 of 41) sorted by relevance

12

/NextBSD/contrib/llvm/lib/IR/
HDConstantRange.cpp462 return ConstantRange(Lower.sext(DstTySize), Upper.zext(DstTySize)); in signExtend()
469 return ConstantRange(Lower.sext(DstTySize), Upper.sext(DstTySize)); in signExtend()
623 this_min = getSignedMin().sext(getBitWidth() * 2); in multiply()
624 this_max = getSignedMax().sext(getBitWidth() * 2); in multiply()
625 Other_min = Other.getSignedMin().sext(getBitWidth() * 2); in multiply()
626 Other_max = Other.getSignedMax().sext(getBitWidth() * 2); in multiply()
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86InstrExtension.td53 [(set GR32:$dst, (sext GR8:$src))], IIC_MOVSX>, TB,
61 [(set GR32:$dst, (sext GR16:$src))], IIC_MOVSX>, TB,
125 [(set GR64:$dst, (sext GR8:$src))], IIC_MOVSX>, TB,
133 [(set GR64:$dst, (sext GR16:$src))], IIC_MOVSX>, TB,
141 [(set GR64:$dst, (sext GR32:$src))], IIC_MOVSX>,
HDX86InstrCompiler.td302 def : Pat<(i16 (sext (i8 (X86setcc_c X86_COND_B, EFLAGS)))),
304 def : Pat<(i32 (sext (i8 (X86setcc_c X86_COND_B, EFLAGS)))),
306 def : Pat<(i64 (sext (i8 (X86setcc_c X86_COND_B, EFLAGS)))),
1352 // sext, sext_load, zext, zext_load
1353 def: Pat<(i16 (sext GR8:$src)),
HDX86TargetTransformInfo.cpp1003 ImmVal = Imm.sext((BitSize + 63) & ~0x3fU); in getIntImmCost()
/NextBSD/contrib/llvm/lib/Target/SystemZ/
HDSystemZPatterns.td13 def : Pat<(operator (sext (i32 GR32:$src))),
24 def : Pat<(operator cls:$src1, (sext GR32:$src2)),
HDSystemZOperators.td349 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
/NextBSD/contrib/llvm/lib/Target/NVPTX/
HDNVPTXInstrInfo.td504 def : Pat<(shl (sext Int32Regs:$a), (i32 Int5Const:$b)),
511 def : Pat<(shl (sext Int16Regs:$a), (i16 Int4Const:$b)),
518 def : Pat<(mul (sext Int32Regs:$a), (sext Int32Regs:$b)),
521 def : Pat<(mul (sext Int32Regs:$a), (i64 SInt32Const:$b)),
532 def : Pat<(mul (sext Int16Regs:$a), (sext Int16Regs:$b)),
535 def : Pat<(mul (sext Int16Regs:$a), (i32 SInt16Const:$b)),
2428 // sext i1
2429 def : Pat<(i16 (sext Int1Regs:$a)),
2431 def : Pat<(i32 (sext Int1Regs:$a)),
2433 def : Pat<(i64 (sext Int1Regs:$a)),
[all …]
/NextBSD/contrib/llvm/lib/Transforms/Scalar/
HDStraightLineStrengthReduce.cpp550 A = A.sext(B.getBitWidth()); in unifyBitWidth()
552 B = B.sext(A.getBitWidth()); in unifyBitWidth()
HDSeparateConstOffsetFromGEP.cpp512 ZeroExtended, NonNegative).sext(BitWidth); in find()
/NextBSD/contrib/llvm/include/llvm/ADT/
HDAPSInt.h88 return APSInt(sext(width), IsUnsigned); in extend()
HDAPInt.h1183 APInt LLVM_ATTRIBUTE_UNUSED_RESULT sext(unsigned width) const;
/NextBSD/contrib/llvm/lib/Support/
HDAPInt.cpp877 int64_t sext = (int64_t(getWord(0)) << (64-BitWidth)) >> (64-BitWidth); in roundToDouble() local
878 return double(sext); in roundToDouble()
955 APInt APInt::sext(unsigned width) const { in sext() function in APInt
1025 return sext(width); in sextOrTrunc()
1039 return sext(width); in sextOrSelf()
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonInstrInfoV3.td104 [(set (i64 DoubleRegs:$Rd), (i64 (add (i64 (sext (i32 IntRegs:$Rs))),
HDHexagonInstrInfoVector.td359 def: Pat<(v4i16 (sext V4I8:$Rs)), (S2_vsxtbh V4I8:$Rs)>;
360 def: Pat<(v2i32 (sext V2I16:$Rs)), (S2_vsxthw V2I16:$Rs)>;
HDHexagonInstrInfo.td3214 def: Pat<(i64 (mul (i64 (sext (i32 IntRegs:$src1))),
3215 (i64 (sext (i32 IntRegs:$src2))))),
3226 (mul (i64 (sext (i32 IntRegs:$src2))),
3227 (i64 (sext (i32 IntRegs:$src3)))))),
3231 (mul (i64 (sext (i32 IntRegs:$src2))),
3232 (i64 (sext (i32 IntRegs:$src3)))))),
3979 def: Pat <(i64 (sext I32:$src)), (A2_sxtw I32:$src)>;
5081 def: Pat<(i32 (sext (i1 PredRegs:$src1))),
5085 def: Pat<(i64 (sext (i1 PredRegs:$src1))),
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64InstrInfo.td690 def SMADDLrrr : WideMulAccum<0, 0b001, "smaddl", add, sext>;
691 def SMSUBLrrr : WideMulAccum<1, 0b001, "smsubl", sub, sext>;
695 def : Pat<(i64 (mul (sext GPR32:$Rn), (sext GPR32:$Rm))),
700 def : Pat<(i64 (ineg (mul (sext GPR32:$Rn), (sext GPR32:$Rm)))),
2750 // three of zext, sext and anyext so it's easier to pull the patterns out of the
2769 defm : SIMDVectorLShiftLongBySizeBHSPats<sext>;
3373 BinOpFrag<(add (sext node:$LHS), (sext node:$RHS))>>;
3375 BinOpFrag<(add node:$LHS, (sext node:$RHS))>>;
3388 BinOpFrag<(sub (sext node:$LHS), (sext node:$RHS))>>;
3390 BinOpFrag<(sub node:$LHS, (sext node:$RHS))>>;
[all …]
HDAArch64TargetTransformInfo.cpp50 ImmVal = Imm.sext((BitSize + 63) & ~0x3fU); in getIntImmCost()
/NextBSD/contrib/llvm/lib/AsmParser/
HDLLLexer.cpp717 INSTKEYWORD(sext, SExt); in LexIdentifier()
/NextBSD/contrib/llvm/include/llvm/Target/
HDTargetSelectionDAG.td130 def SDTIntExtendOp : SDTypeProfile<1, 1, [ // sext, zext, anyext
396 def sext : SDNode<"ISD::SIGN_EXTEND", SDTIntExtendOp>;
/NextBSD/contrib/llvm/lib/Target/PowerPC/
HDPPCInstrInfo.td317 // For 64-bit, make sure it is sext right.
2822 def : Pat<(i32 (sext i1:$in)),
2827 def : Pat<(i64 (sext i1:$in)),
2830 // FIXME: We should choose either a zext or a sext based on other constants
2930 def : Pat<(i32 (sext pattern)),
2936 def : Pat<(i64 (sext pattern)),
2939 // FIXME: We should choose either a zext or a sext based on other constants
/NextBSD/contrib/llvm/lib/Target/XCore/
HDXCoreInstrInfo.td750 "sext $dst, $src2",
756 "sext $dst, $src2",
/NextBSD/contrib/llvm/lib/ExecutionEngine/Interpreter/
HDExecution.cpp1249 Dest.AggregateVal[i].IntVal = Src.AggregateVal[i].IntVal.sext(DBitWidth); in executeSExtInst()
1253 Dest.IntVal = Src.IntVal.sext(DBitWidth); in executeSExtInst()
/NextBSD/contrib/llvm/lib/Transforms/InstCombine/
HDInstructionCombining.cpp1115 if (SmallScale.sext(Scale.getBitWidth()) != Scale) in Descale()
1141 Scale = Scale.sext(LargeSize); in Descale()
/NextBSD/contrib/llvm/lib/Target/Sparc/
HDSparcInstr64Bit.td41 def : Pat<(i64 (sext i32:$val)), (SRAri $val, 0)>;
/NextBSD/contrib/llvm/lib/Target/Mips/
HDMips64InstrInfo.td516 def : MipsPat<(i64 (sext GPR32:$src)), (SLL64_32 GPR32:$src)>;

12