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/NextBSD/sys/boot/fdt/dts/powerpc/
HDmpc8572ds.dts88 reg = <0x0>;
125 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000>;
131 reg = <0x0 0x0 0x8000000>;
136 reg = <0x0 0x03000000>;
182 reg = <0x2 0x0 0x40000>;
185 reg = <0x0 0x02000000>;
221 reg = <0x4 0x0 0x40000>;
227 reg = <0x5 0x0 0x40000>;
233 reg = <0x6 0x0 0x40000>;
242 ranges = <0x0 0 0xffe00000 0x100000>;
[all …]
HDp2020ds.dts86 reg = <0x0>;
109 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
110 0x1 0x0 0x0 0xe0000000 0x08000000
111 0x2 0x0 0x0 0xffa00000 0x00040000
112 0x3 0x0 0x0 0xffdf0000 0x00008000
113 0x4 0x0 0x0 0xffa40000 0x00040000
114 0x5 0x0 0x0 0xffa80000 0x00040000
115 0x6 0x0 0x0 0xffac0000 0x00040000>;
121 reg = <0x0 0x0 0x8000000>;
126 reg = <0x0 0x03000000>;
[all …]
HDmpc8555cds.dts86 reg = <0x0>;
100 reg = <0x0 0x10000000>; // 256M at 0x0
111 ranges = <0x0 0x0 0xff800000 0x00800000
112 0x1 0x0 0xff000000 0x00800000
113 0x2 0x0 0xf8000000 0x00008000>;
119 reg = <0x0 0x0 0x00800000>;
128 reg = <0x1 0x0 0x00800000>;
137 reg = <0x2 0x0 0x00008000>;
148 ranges = <0x0 0xe0000000 0x100000>;
153 reg = <0x0 0x1000>;
[all …]
/NextBSD/sys/gnu/dts/arm/
HDimx27-eukrea-cpuimx27.dtsi172 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
173 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
174 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
175 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
176 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
177 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
178 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
179 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
180 MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
181 MX27_PAD_ATA_DATA7__FEC_MDC 0x0
[all …]
HDimx27-phytec-phycore-rdk.dts106 MX27_PAD_USB_OC_B__GPIO2_24 0x0
112 MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
118 MX27_PAD_LD0__LD0 0x0
119 MX27_PAD_LD1__LD1 0x0
120 MX27_PAD_LD2__LD2 0x0
121 MX27_PAD_LD3__LD3 0x0
122 MX27_PAD_LD4__LD4 0x0
123 MX27_PAD_LD5__LD5 0x0
124 MX27_PAD_LD6__LD6 0x0
125 MX27_PAD_LD7__LD7 0x0
[all …]
HDimx27-pdk.dts128 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
129 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
130 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
131 MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */
132 MX27_PAD_TOUT__GPIO3_14 0x0 /* PMIC IRQ */
138 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
139 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
140 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
141 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
142 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
[all …]
HDimx27-eukrea-mbimxsd27-baseboard.dts167 MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
168 MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
169 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
170 MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* CS0 */
176 MX27_PAD_PWMO__GPIO5_5 0x0
182 MX27_PAD_PC_PWRON__GPIO6_16 0x0
183 MX27_PAD_PC_CD2_B__GPIO6_19 0x0
189 MX27_PAD_LD0__LD0 0x0
190 MX27_PAD_LD1__LD1 0x0
191 MX27_PAD_LD2__LD2 0x0
[all …]
HDimx27-apf27dev.dts143 MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
144 MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
145 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
150 fsl,pins = <MX27_PAD_CSPI1_SS0__GPIO4_28 0x0>;
155 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
156 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
157 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
163 MX27_PAD_CSI_D5__GPIO2_17 0x0
164 MX27_PAD_CSPI2_SS0__GPIO4_21 0x0
165 MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
[all …]
HDtegra124.dtsi20 reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
21 0x0 0x01003800 0x0 0x00000800 /* AFI registers */
22 0x0 0x02000000 0x0 0x10000000>; /* configuration space */
36 ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
37 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
38 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
39 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
40 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
85 reg = <0x0 0x50000000 0x0 0x00034000>;
99 reg = <0x0 0x54200000 0x0 0x00040000>;
[all …]
HDimx27-phytec-phycard-s-som.dtsi54 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
55 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
56 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
57 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
58 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
59 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
60 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
61 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
62 MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
63 MX27_PAD_ATA_DATA7__FEC_MDC 0x0
[all …]
HDimx27-phytec-phycore-som.dtsi217 MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
218 MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
219 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
220 MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* SPI1 CS0 */
226 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
227 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
228 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
229 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
230 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
231 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
[all …]
HDimx1-ads.dts99 MX1_PAD_SPI1_MISO__SPI1_MISO 0x0
100 MX1_PAD_SPI1_MOSI__SPI1_MOSI 0x0
101 MX1_PAD_SPI1_RDY__SPI1_RDY 0x0
102 MX1_PAD_SPI1_SCLK__SPI1_SCLK 0x0
103 MX1_PAD_SPI1_SS__GPIO3_15 0x0
109 MX1_PAD_I2C_SCL__I2C_SCL 0x0
110 MX1_PAD_I2C_SDA__I2C_SDA 0x0
116 MX1_PAD_UART1_TXD__UART1_TXD 0x0
117 MX1_PAD_UART1_RXD__UART1_RXD 0x0
118 MX1_PAD_UART1_CTS__UART1_CTS 0x0
[all …]
HDimx1-apf9328.dts80 MX1_PAD_SIM_SVEN__GPIO2_14 0x0
86 MX1_PAD_I2C_SCL__I2C_SCL 0x0
87 MX1_PAD_I2C_SDA__I2C_SDA 0x0
93 MX1_PAD_UART1_TXD__UART1_TXD 0x0
94 MX1_PAD_UART1_RXD__UART1_RXD 0x0
95 MX1_PAD_UART1_CTS__UART1_CTS 0x0
96 MX1_PAD_UART1_RTS__UART1_RTS 0x0
102 MX1_PAD_UART2_TXD__UART2_TXD 0x0
103 MX1_PAD_UART2_RXD__UART2_RXD 0x0
104 MX1_PAD_UART2_CTS__UART2_CTS 0x0
[all …]
HDls1021a.dtsi110 reg = <0x0 0x1401000 0x0 0x1000>,
111 <0x0 0x1402000 0x0 0x1000>,
112 <0x0 0x1404000 0x0 0x2000>,
113 <0x0 0x1406000 0x0 0x2000>;
120 reg = <0x0 0x1530000 0x0 0x10000>;
126 reg = <0x0 0x1ee0000 0x0 0x10000>;
132 reg = <0x0 0x1560000 0x0 0x10000>;
144 reg = <0x0 0x1570000 0x0 0x10000>;
151 ranges = <0x0 0x0 0x1ee1000 0x10000>;
179 reg = <0x0 0x10>;
[all …]
HDimx27-apf27.dts42 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
43 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
44 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
45 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
46 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
47 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
48 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
49 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
50 MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
51 MX27_PAD_ATA_DATA7__FEC_MDC 0x0
[all …]
HDimx27-phytec-phycard-s-rdk.dts84 MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
85 MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
91 MX27_PAD_RTCK__OWIRE 0x0
97 MX27_PAD_SD2_CLK__SD2_CLK 0x0
98 MX27_PAD_SD2_CMD__SD2_CMD 0x0
99 MX27_PAD_SD2_D0__SD2_D0 0x0
100 MX27_PAD_SD2_D1__SD2_D1 0x0
101 MX27_PAD_SD2_D2__SD2_D2 0x0
102 MX27_PAD_SD2_D3__SD2_D3 0x0
103 MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
[all …]
/NextBSD/sys/arm64/arm64/
HDsupport.S45 mov x0, #-1
54 cmp x0, x4
58 1: ldxr w4, [x0] /* Load-exclusive the data */
61 stxr w5, w3, [x0] /* Store the new data */
65 mov x0, #0 /* Success */
74 cmp x0, x4
78 1: ldxr x4, [x0] /* Load-exclusive the data */
81 stxr w5, x3, [x0] /* Store the new data */
85 mov x0, #0 /* Success */
94 cmp x0, x1
[all …]
HDbus_space_asm.S48 ldr x0, [x1, x2]
57 add x0, x1, x2
65 1: ldrb w1, [x0]
78 add x0, x1, x2
86 1: ldrh w1, [x0]
99 add x0, x1, x2
107 1: ldr w1, [x0]
120 add x0, x1, x2
128 1: ldr x1, [x0]
141 add x0, x1, x2
[all …]
/NextBSD/lib/libc/aarch64/gen/
HDsetjmp.S39 stp x0, lr, [sp]
42 add x2, x0, #(_JB_SIGMASK * 8) /* oset */
44 mov x0, #1 /* SIG_BLOCK */
47 ldp x0, lr, [sp]
53 stp x8, x9, [x0], #16
56 stp x19, x20, [x0], #16
57 stp x21, x22, [x0], #16
58 stp x23, x24, [x0], #16
59 stp x25, x26, [x0], #16
60 stp x27, x28, [x0], #16
[all …]
HD_setjmp.S41 stp x8, x9, [x0], #16
44 stp x19, x20, [x0], #16
45 stp x21, x22, [x0], #16
46 stp x23, x24, [x0], #16
47 stp x25, x26, [x0], #16
48 stp x27, x28, [x0], #16
49 stp x29, lr, [x0], #16
53 stp d8, d9, [x0], #16
54 stp d10, d11, [x0], #16
55 stp d12, d13, [x0], #16
[all …]
/NextBSD/contrib/file/magic/Magdir/
HDc6435 0 string C64\x20tape\x20image\x20file\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0 T64 tape Image
40 0 string C64S\x20tape\x20image\x20file\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0 T64 tape Image
/NextBSD/lib/libc/sparc64/fpu/
HDfpu_sqrt.c195 u_int x0, x1, x2, x3; local
227 FPU_ADDCS(x1, x1, x1); FPU_ADDC(x0, x0, x0); \
231 x0 = (x0 << 1) | (x1 >> 31); x1 = (x1 << 1) | (x2 >> 31); \
242 x0 = x->fp_mant[0];
276 x0 -= bit;
283 if (x0 >= t0) { /* if x >= t then */
284 x0 -= t0; /* x -= t */
302 FPU_SUBC(d0, x0, t0); /* d = x - t */
304 x0 = d0, x1 = d1; /* x -= t */
313 FPU_SUBC(d0, x0, t0);
[all …]
/NextBSD/sys/boot/fdt/dts/arm/
HDdb88f6281.dts59 reg = <0x0>;
72 reg = <0x0 0x20000000>; // 512M at 0x0
82 ranges = <0x0 0x2f 0xf9300000 0x00100000>;
88 reg = <0x0 0x0 0x00100000>;
93 reg = <0x0 0x200000>;
109 ranges = <0x0 0xf1000000 0x00100000>;
187 ranges = <0x0 0x72000 0x2000>;
266 ranges = <0x02000000 0x0 0xf1300000 0xf1300000 0x0 0x04000000
267 0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>;
271 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
[all …]
/NextBSD/sys/powerpc/fpu/
HDfpu_sqrt.c195 u_int x0, x1, x2, x3; in fpu_sqrt() local
244 FPU_ADDCS(x1, x1, x1); FPU_ADDC(x0, x0, x0); \ in fpu_sqrt()
248 x0 = (x0 << 1) | (x1 >> 31); x1 = (x1 << 1) | (x2 >> 31); \ in fpu_sqrt()
259 x0 = x->fp_mant[0]; in fpu_sqrt()
293 x0 -= bit; in fpu_sqrt()
300 if (x0 >= t0) { /* if x >= t then */ in fpu_sqrt()
301 x0 -= t0; /* x -= t */ in fpu_sqrt()
319 FPU_SUBC(d0, x0, t0); /* d = x - t */ in fpu_sqrt()
321 x0 = d0, x1 = d1; /* x -= t */ in fpu_sqrt()
330 FPU_SUBC(d0, x0, t0); in fpu_sqrt()
[all …]
/NextBSD/crypto/openssl/crypto/rc2/
HDrc2_cbc.c141 register RC2_INT x0, x1, x2, x3, t; in RC2_encrypt() local
145 x0 = (RC2_INT) l & 0xffff; in RC2_encrypt()
156 t = (x0 + (x1 & ~x3) + (x2 & x3) + *(p0++)) & 0xffff; in RC2_encrypt()
157 x0 = (t << 1) | (t >> 15); in RC2_encrypt()
158 t = (x1 + (x2 & ~x0) + (x3 & x0) + *(p0++)) & 0xffff; in RC2_encrypt()
160 t = (x2 + (x3 & ~x1) + (x0 & x1) + *(p0++)) & 0xffff; in RC2_encrypt()
162 t = (x3 + (x0 & ~x2) + (x1 & x2) + *(p0++)) & 0xffff; in RC2_encrypt()
170 x0 += p1[x3 & 0x3f]; in RC2_encrypt()
171 x1 += p1[x0 & 0x3f]; in RC2_encrypt()
178 (unsigned long)(x0 & 0xffff) | ((unsigned long)(x1 & 0xffff) << 16L); in RC2_encrypt()
[all …]

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